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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-20 06:38:32 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-20 06:38:32 +0000
commit8e86929e3ce3fe56295d2704b93bf14c709b311a (patch)
tree724d2f52b31243fda72dd8ab5f10ba9b9297dd99 /lib/CodeGen/TwoAddressInstructionPass.cpp
parent4991de8fe1e72230cf714378b96411f1b59f6b77 (diff)
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Properly constrain register classes in 2-addr.
X86 has 2-addr instructions with different constraints on the tied def and use operands. One is GR32, one is GR32_NOSP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157149 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/TwoAddressInstructionPass.cpp')
-rw-r--r--lib/CodeGen/TwoAddressInstructionPass.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 8164690e40..5218aa1f7a 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1555,6 +1555,12 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
MO.setIsKill(false);
RemovedKillFlag = true;
}
+
+ // Make sure regA is a legal regclass for the SrcIdx operand.
+ if (TargetRegisterInfo::isVirtualRegister(regA) &&
+ TargetRegisterInfo::isVirtualRegister(regB))
+ MRI->constrainRegClass(regA, MRI->getRegClass(regB));
+
MO.setReg(regA);
if (isCopy)