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| author | Abdoulaye Walsimou Gaye <awg@embtoolkit.org> | 2012-12-01 15:46:04 +0100 |
|---|---|---|
| committer | Abdoulaye Walsimou Gaye <awg@embtoolkit.org> | 2012-12-01 15:46:04 +0100 |
| commit | 27096caef97e46d150cd53eab47e1ada83729e10 (patch) | |
| tree | 1b3f769a0dd8c64fbd7e277c6001368f82872338 /lib/CodeGen | |
| parent | dd0d4df3d60a2040d9ea90ddf7616282bfc91cb5 (diff) | |
| parent | 24d616e51f503d77fe9dca5904991292831b9132 (diff) | |
| download | llvm-27096caef97e46d150cd53eab47e1ada83729e10.tar.gz llvm-27096caef97e46d150cd53eab47e1ada83729e10.tar.bz2 llvm-27096caef97e46d150cd53eab47e1ada83729e10.tar.xz | |
Merge branch 'release-3.2' into embtk-support-release-3.2
Diffstat (limited to 'lib/CodeGen')
| -rw-r--r-- | lib/CodeGen/MachineCSE.cpp | 2 | ||||
| -rw-r--r-- | lib/CodeGen/RegisterCoalescer.cpp | 9 |
2 files changed, 10 insertions, 1 deletions
diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp index 497e000b68..dbc41defeb 100644 --- a/lib/CodeGen/MachineCSE.cpp +++ b/lib/CodeGen/MachineCSE.cpp @@ -429,8 +429,8 @@ void MachineCSE::ExitScope(MachineBasicBlock *MBB) { DEBUG(dbgs() << "Exiting: " << MBB->getName() << '\n'); DenseMap<MachineBasicBlock*, ScopeType*>::iterator SI = ScopeMap.find(MBB); assert(SI != ScopeMap.end()); - ScopeMap.erase(SI); delete SI->second; + ScopeMap.erase(SI); } bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) { diff --git a/lib/CodeGen/RegisterCoalescer.cpp b/lib/CodeGen/RegisterCoalescer.cpp index e47a677b77..2538f10ede 100644 --- a/lib/CodeGen/RegisterCoalescer.cpp +++ b/lib/CodeGen/RegisterCoalescer.cpp @@ -850,8 +850,17 @@ void RegisterCoalescer::updateRegDefsUses(unsigned SrcReg, // Update LiveDebugVariables. LDV->renameRegister(SrcReg, DstReg, SubIdx); + SmallPtrSet<MachineInstr*, 8> Visited; for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(SrcReg); MachineInstr *UseMI = I.skipInstruction();) { + // Each instruction can only be rewritten once because sub-register + // composition is not always idempotent. When SrcReg != DstReg, rewriting + // the UseMI operands removes them from the SrcReg use-def chain, but when + // SrcReg is DstReg we could encounter UseMI twice if it has multiple + // operands mentioning the virtual register. + if (SrcReg == DstReg && !Visited.insert(UseMI)) + continue; + SmallVector<unsigned,8> Ops; bool Reads, Writes; tie(Reads, Writes) = UseMI->readsWritesVirtualRegister(SrcReg, &Ops); |