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authorBill Schmidt <wschmidt@linux.vnet.ibm.com>2013-07-26 01:35:43 +0000
committerBill Schmidt <wschmidt@linux.vnet.ibm.com>2013-07-26 01:35:43 +0000
commitf38cc38fa647d4e72c053c39bbe0cdec1342535f (patch)
treedf4f4c8effb52f7abc5ea69393a45bf20ef3241e /lib/Support/Triple.cpp
parentfb5b3eaacbc65603b436279300c32512176150fe (diff)
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[PowerPC] Support powerpc64le as a syntax-checking target.
This patch provides basic support for powerpc64le as an LLVM target. However, use of this target will not actually generate little-endian code. Instead, use of the target will cause the correct little-endian built-in defines to be generated, so that code that tests for __LITTLE_ENDIAN__, for example, will be correctly parsed for syntax-only testing. Code generation will otherwise be the same as powerpc64 (big-endian), for now. The patch leaves open the possibility of creating a little-endian PowerPC64 back end, but there is no immediate intent to create such a thing. The LLVM portions of this patch simply add ppc64le coverage everywhere that ppc64 coverage currently exists. There is nothing of any import worth testing until such time as little-endian code generation is implemented. In the corresponding Clang patch, there is a new test case variant to ensure that correct built-in defines for little-endian code are generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187179 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Support/Triple.cpp')
-rw-r--r--lib/Support/Triple.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Support/Triple.cpp b/lib/Support/Triple.cpp
index 7a30e03a9e..d0d0e14fce 100644
--- a/lib/Support/Triple.cpp
+++ b/lib/Support/Triple.cpp
@@ -28,6 +28,7 @@ const char *Triple::getArchTypeName(ArchType Kind) {
case mips64el:return "mips64el";
case msp430: return "msp430";
case ppc64: return "powerpc64";
+ case ppc64le: return "powerpc64le";
case ppc: return "powerpc";
case r600: return "r600";
case sparc: return "sparc";
@@ -60,6 +61,7 @@ const char *Triple::getArchTypePrefix(ArchType Kind) {
case thumb: return "arm";
case ppc64:
+ case ppc64le:
case ppc: return "ppc";
case mips:
@@ -168,6 +170,7 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
.Case("ppc64", ppc64)
.Case("ppc32", ppc)
.Case("ppc", ppc)
+ .Case("ppc64le", ppc64le)
.Case("r600", r600)
.Case("hexagon", hexagon)
.Case("sparc", sparc)
@@ -197,6 +200,7 @@ const char *Triple::getArchNameForAssembler() {
.Case("x86_64", "x86_64")
.Case("powerpc", "ppc")
.Case("powerpc64", "ppc64")
+ .Case("powerpc64le", "ppc64le")
.Case("arm", "arm")
.Cases("armv4t", "thumbv4t", "armv4t")
.Cases("armv5", "armv5e", "thumbv5", "thumbv5e", "armv5")
@@ -220,6 +224,7 @@ static Triple::ArchType parseArch(StringRef ArchName) {
.Cases("amd64", "x86_64", Triple::x86_64)
.Case("powerpc", Triple::ppc)
.Cases("powerpc64", "ppu", Triple::ppc64)
+ .Case("powerpc64le", Triple::ppc64le)
.Case("aarch64", Triple::aarch64)
.Cases("arm", "xscale", Triple::arm)
// FIXME: It would be good to replace these with explicit names for all the
@@ -690,6 +695,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::mips64el:
case llvm::Triple::nvptx64:
case llvm::Triple::ppc64:
+ case llvm::Triple::ppc64le:
case llvm::Triple::sparcv9:
case llvm::Triple::systemz:
case llvm::Triple::x86_64:
@@ -718,6 +724,7 @@ Triple Triple::get32BitArchVariant() const {
case Triple::aarch64:
case Triple::msp430:
case Triple::systemz:
+ case Triple::ppc64le:
T.setArch(UnknownArch);
break;
@@ -772,6 +779,7 @@ Triple Triple::get64BitArchVariant() const {
case Triple::mips64el:
case Triple::nvptx64:
case Triple::ppc64:
+ case Triple::ppc64le:
case Triple::sparcv9:
case Triple::systemz:
case Triple::x86_64: