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| author | Tim Northover <Tim.Northover@arm.com> | 2013-02-06 09:04:56 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-02-06 09:04:56 +0000 |
| commit | 9e3b31345f0d17b757e183a8384db92616256926 (patch) | |
| tree | 33d5bbc47edbeb3d0563dc918a8d008c953af3bd /lib/Target/AArch64 | |
| parent | 95ce4c2ffb0ff31a79b060fb112659322a5be3bf (diff) | |
| download | llvm-9e3b31345f0d17b757e183a8384db92616256926.tar.gz llvm-9e3b31345f0d17b757e183a8384db92616256926.tar.bz2 llvm-9e3b31345f0d17b757e183a8384db92616256926.tar.xz | |
Add icache prefetch operations to AArch64
This adds hints to the various "prfm" instructions so that they can
affect the instruction cache as well as the data cache.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174495 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64')
| -rw-r--r-- | lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | 6 | ||||
| -rw-r--r-- | lib/Target/AArch64/Utils/AArch64BaseInfo.h | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp b/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp index 5f09074bcf..ab9bba1836 100644 --- a/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp +++ b/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp @@ -120,6 +120,12 @@ const NamedImmMapper::Mapping A64PRFM::PRFMMapper::PRFMPairs[] = { {"pldl2strm", PLDL2STRM}, {"pldl3keep", PLDL3KEEP}, {"pldl3strm", PLDL3STRM}, + {"plil1keep", PLIL1KEEP}, + {"plil1strm", PLIL1STRM}, + {"plil2keep", PLIL2KEEP}, + {"plil2strm", PLIL2STRM}, + {"plil3keep", PLIL3KEEP}, + {"plil3strm", PLIL3STRM}, {"pstl1keep", PSTL1KEEP}, {"pstl1strm", PSTL1STRM}, {"pstl2keep", PSTL2KEEP}, diff --git a/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/lib/Target/AArch64/Utils/AArch64BaseInfo.h index 48e6c83fd2..5eebf44431 100644 --- a/lib/Target/AArch64/Utils/AArch64BaseInfo.h +++ b/lib/Target/AArch64/Utils/AArch64BaseInfo.h @@ -248,6 +248,12 @@ namespace A64PRFM { PLDL2STRM = 0x03, PLDL3KEEP = 0x04, PLDL3STRM = 0x05, + PLIL1KEEP = 0x08, + PLIL1STRM = 0x09, + PLIL2KEEP = 0x0a, + PLIL2STRM = 0x0b, + PLIL3KEEP = 0x0c, + PLIL3STRM = 0x0d, PSTL1KEEP = 0x10, PSTL1STRM = 0x11, PSTL2KEEP = 0x12, |