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| author | Evan Cheng <evan.cheng@apple.com> | 2011-09-20 21:38:18 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-09-20 21:38:18 +0000 |
| commit | 0d18174f0f138e98fcb8348b735a90add45428b8 (patch) | |
| tree | b7144003b01c53b3ee91bab049945a3e5a88f337 /lib/Target/ARM/ARM.td | |
| parent | 1daa5bea5858ca9d05ab6da1a38a66471e26a7a6 (diff) | |
| download | llvm-0d18174f0f138e98fcb8348b735a90add45428b8.tar.gz llvm-0d18174f0f138e98fcb8348b735a90add45428b8.tar.bz2 llvm-0d18174f0f138e98fcb8348b735a90add45428b8.tar.xz | |
Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140181 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARM.td')
| -rw-r--r-- | lib/Target/ARM/ARM.td | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td index baf051cc23..994271d678 100644 --- a/lib/Target/ARM/ARM.td +++ b/lib/Target/ARM/ARM.td @@ -108,7 +108,7 @@ def HasV6Ops : SubtargetFeature<"v6", "HasV6Ops", "true", [HasV5TEOps]>; def HasV6T2Ops : SubtargetFeature<"v6t2", "HasV6T2Ops", "true", "Support ARM v6t2 instructions", - [HasV6Ops, FeatureThumb2, FeatureDSPThumb2]>; + [HasV6Ops, FeatureThumb2]>; def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true", "Support ARM v7 instructions", [HasV6T2Ops]>; @@ -188,9 +188,11 @@ def : Processor<"cortex-m0", ARMV6Itineraries, [HasV6Ops, FeatureNoARM, FeatureDB]>; // V6T2 Processors. -def : Processor<"arm1156t2-s", ARMV6Itineraries, [HasV6T2Ops]>; +def : Processor<"arm1156t2-s", ARMV6Itineraries, [HasV6T2Ops, + FeatureDSPThumb2]>; def : Processor<"arm1156t2f-s", ARMV6Itineraries, [HasV6T2Ops, FeatureVFP2, - FeatureHasSlowFPVMLx]>; + FeatureHasSlowFPVMLx, + FeatureDSPThumb2]>; // V7a Processors. def : Processor<"cortex-a8", CortexA8Itineraries, |