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| author | Bob Wilson <bob.wilson@apple.com> | 2010-10-12 16:22:47 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-10-12 16:22:47 +0000 |
| commit | 77f42b52781b6923924a93b8ab338d183887a592 (patch) | |
| tree | ea76c3d5ca1c77836b14ee0ca644a8b772c09f98 /lib/Target/ARM/ARM.td | |
| parent | 15418779419923dc9222cd804d409c1878b5e3b1 (diff) | |
| download | llvm-77f42b52781b6923924a93b8ab338d183887a592.tar.gz llvm-77f42b52781b6923924a93b8ab338d183887a592.tar.bz2 llvm-77f42b52781b6923924a93b8ab338d183887a592.tar.xz | |
PR8359: The ARM backend may end up allocating registers D16 to D31 when
"-mattr=+vfp3" is specified. However, this will not work for hardware that
only supports 16 registers. Add a new flag to support -"mattr=+vfp3,+d16".
Patch by Jan Voung!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116310 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARM.td')
| -rw-r--r-- | lib/Target/ARM/ARM.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td index 883581a48b..0ebdd75244 100644 --- a/lib/Target/ARM/ARM.td +++ b/lib/Target/ARM/ARM.td @@ -33,6 +33,8 @@ def FeatureNoARM : SubtargetFeature<"noarm", "NoARM", "true", "Does not support ARM mode execution">; def FeatureFP16 : SubtargetFeature<"fp16", "HasFP16", "true", "Enable half-precision floating point">; +def FeatureD16 : SubtargetFeature<"d16", "HasD16", "true", + "Restrict VFP3 to 16 double registers">; def FeatureHWDiv : SubtargetFeature<"hwdiv", "HasHardwareDivide", "true", "Enable divide instructions">; def FeatureT2XtPk : SubtargetFeature<"t2xtpk", "HasT2ExtractPack", "true", |