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| author | Andrew Trick <atrick@apple.com> | 2012-06-22 03:58:51 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-06-22 03:58:51 +0000 |
| commit | d85934b3e5a96040e199e1b098705eb56cde584a (patch) | |
| tree | d4fc16ec73599d4d8860172ba7adec80357e1d3c /lib/Target/ARM/ARM.td | |
| parent | e208c491726bb1efbfc4fc05a9f73ad808432979 (diff) | |
| download | llvm-d85934b3e5a96040e199e1b098705eb56cde584a.tar.gz llvm-d85934b3e5a96040e199e1b098705eb56cde584a.tar.bz2 llvm-d85934b3e5a96040e199e1b098705eb56cde584a.tar.xz | |
Use "NoItineraries" for processors with no itineraries.
This makes it explicit when ScoreboardHazardRecognizer will be used.
"GenericItineraries" would only make sense if it contained real
itinerary values and still required ScoreboardHazardRecognizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158963 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARM.td')
| -rw-r--r-- | lib/Target/ARM/ARM.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td index 9b0cb0c9e5..d332d20f80 100644 --- a/lib/Target/ARM/ARM.td +++ b/lib/Target/ARM/ARM.td @@ -141,7 +141,7 @@ def ProcA9 : SubtargetFeature<"a9", "ARMProcFamily", "CortexA9", FeatureAvoidPartialCPSR]>; class ProcNoItin<string Name, list<SubtargetFeature> Features> - : Processor<Name, GenericItineraries, Features>; + : Processor<Name, NoItineraries, Features>; // V4 Processors. def : ProcNoItin<"generic", []>; |