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| author | Evan Cheng <evan.cheng@apple.com> | 2011-07-07 08:26:46 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-07 08:26:46 +0000 |
| commit | db068738e806753bc5735434cab9b9f930840c7a (patch) | |
| tree | 6badab5755b9428aec30cdbbf587f07271d2e89e /lib/Target/ARM/ARM.td | |
| parent | 347c50a2933f756097fa5798f2b6c34a19df4162 (diff) | |
| download | llvm-db068738e806753bc5735434cab9b9f930840c7a.tar.gz llvm-db068738e806753bc5735434cab9b9f930840c7a.tar.bz2 llvm-db068738e806753bc5735434cab9b9f930840c7a.tar.xz | |
Sink feature IsThumb into MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134608 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARM.td')
| -rw-r--r-- | lib/Target/ARM/ARM.td | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td index 4e170f5524..54a8e9873c 100644 --- a/lib/Target/ARM/ARM.td +++ b/lib/Target/ARM/ARM.td @@ -16,6 +16,12 @@ include "llvm/Target/Target.td" +//===----------------------------------------------------------------------===// +// ARM Subtarget state. +// + +def ModeThumb : SubtargetFeature<"thumb", "IsThumb", "true", + "Thumb mode">; //===----------------------------------------------------------------------===// // ARM Subtarget features. @@ -85,23 +91,23 @@ def FeatureDSPThumb2 : SubtargetFeature<"t2dsp", "Thumb2DSP", "true", def FeatureMP : SubtargetFeature<"mp", "HasMPExtension", "true", "Supports Multiprocessing extension">; -// ARM architectures. +// ARM ISAs. def HasV4TOps : SubtargetFeature<"v4t", "HasV4TOps", "true", - "ARM v4T">; + "Support ARM v4T instructions">; def HasV5TOps : SubtargetFeature<"v5t", "HasV5TOps", "true", - "ARM v5T", + "Support ARM v5T instructions", [HasV4TOps]>; def HasV5TEOps : SubtargetFeature<"v5te", "HasV5TEOps", "true", - "ARM v5TE, v5TEj, v5TExp", + "Support ARM v5TE, v5TEj, and v5TExp instructions", [HasV5TOps]>; def HasV6Ops : SubtargetFeature<"v6", "HasV6Ops", "true", - "ARM v6", + "Support ARM v6 instructions", [HasV5TEOps]>; def HasV6T2Ops : SubtargetFeature<"v6t2", "HasV6T2Ops", "true", - "ARM v6t2", + "Support ARM v6t2 instructions", [HasV6Ops, FeatureThumb2, FeatureDSPThumb2]>; def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true", - "ARM v7", + "Support ARM v7 instructions", [HasV6T2Ops]>; //===----------------------------------------------------------------------===// @@ -111,8 +117,6 @@ def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true", include "ARMSchedule.td" // ARM processor families. -def ProcOthers : SubtargetFeature<"others", "ARMProcFamily", "Others", - "One of the other ARM processor families">; def ProcA8 : SubtargetFeature<"a8", "ARMProcFamily", "CortexA8", "Cortex-A8 ARM processors", [FeatureSlowFPBrcc, FeatureNEONForFP, |