diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-30 23:00:43 +0000 |
---|---|---|
committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-30 23:00:43 +0000 |
commit | 4c91bdafacd7387fd92fb153de3d48ef7722bbd2 (patch) | |
tree | d5709c3f09a6e05780d57c12ebbe042de4cc0786 /lib/Target/ARM/ARMAsmPrinter.cpp | |
parent | 4aecc761c7c9069424630ed8dfb8cd382866dd45 (diff) | |
download | llvm-4c91bdafacd7387fd92fb153de3d48ef7722bbd2.tar.gz llvm-4c91bdafacd7387fd92fb153de3d48ef7722bbd2.tar.bz2 llvm-4c91bdafacd7387fd92fb153de3d48ef7722bbd2.tar.xz |
Avoid depending on list orders and register numbering.
This code is covered by test/CodeGen/ARM/arm-modifier.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157720 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMAsmPrinter.cpp')
-rw-r--r-- | lib/Target/ARM/ARMAsmPrinter.cpp | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 2a70a376f3..5bff9fb756 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -441,15 +441,18 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, printOperand(MI, OpNum, O); return false; case 'y': // Print a VFP single precision register as indexed double. - // This uses the ordering of the alias table to get the first 'd' register - // that overlaps the 's' register. Also, s0 is an odd register, hence the - // odd modulus check below. if (MI->getOperand(OpNum).isReg()) { unsigned Reg = MI->getOperand(OpNum).getReg(); const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); - O << ARMInstPrinter::getRegisterName(TRI->getAliasSet(Reg)[0]) << - (((Reg % 2) == 1) ? "[0]" : "[1]"); - return false; + // Find the 'd' register that has this 's' register as a sub-register, + // and determine the lane number. + for (MCSuperRegIterator SR(Reg, TRI); SR.isValid(); ++SR) { + if (!ARM::DPRRegClass.contains(*SR)) + continue; + bool Lane0 = TRI->getSubReg(*SR, ARM::ssub_0) == Reg; + O << ARMInstPrinter::getRegisterName(*SR) << (Lane0 ? "[0]" : "[1]"); + return false; + } } return true; case 'B': // Bitwise inverse of integer or symbol without a preceding #. |