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author | Chad Rosier <mcrosier@apple.com> | 2012-07-06 23:13:38 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2012-07-06 23:13:38 +0000 |
commit | 70cfaa34645bf8ad232c400f0fe7c48a9d715586 (patch) | |
tree | a18b6855ead80d367a0f52e0a96f4625fb742b5a /lib/Target/ARM/ARMConstantIslandPass.cpp | |
parent | 9969458b1673648394fce3f50f3f4a84071c7ca7 (diff) | |
download | llvm-70cfaa34645bf8ad232c400f0fe7c48a9d715586.tar.gz llvm-70cfaa34645bf8ad232c400f0fe7c48a9d715586.tar.bz2 llvm-70cfaa34645bf8ad232c400f0fe7c48a9d715586.tar.xz |
Fix the naming of ensureAlignment. Per the coding standard function names
should be camel case, and start with a lower case letter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159877 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMConstantIslandPass.cpp')
-rw-r--r-- | lib/Target/ARM/ARMConstantIslandPass.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index 10e9da42a9..a953985024 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -415,7 +415,7 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &mf) { // ARM and Thumb2 functions need to be 4-byte aligned. if (!isThumb1) - MF->EnsureAlignment(2); // 2 = log2(4) + MF->ensureAlignment(2); // 2 = log2(4) // Perform the initial placement of the constant pool entries. To start with, // we put them all at the end of the function. @@ -516,7 +516,7 @@ ARMConstantIslands::doInitialPlacement(std::vector<MachineInstr*> &CPEMIs) { // The function needs to be as aligned as the basic blocks. The linker may // move functions around based on their alignment. - MF->EnsureAlignment(BB->getAlignment()); + MF->ensureAlignment(BB->getAlignment()); // Order the entries in BB by descending alignment. That ensures correct // alignment of all entries as long as BB is sufficiently aligned. Keep @@ -815,7 +815,7 @@ void ARMConstantIslands::computeBlockSize(MachineBasicBlock *MBB) { // tBR_JTr contains a .align 2 directive. if (!MBB->empty() && MBB->back().getOpcode() == ARM::tBR_JTr) { BBI.PostAlign = 2; - MBB->getParent()->EnsureAlignment(2); + MBB->getParent()->ensureAlignment(2); } } |