summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARMISelLowering.cpp
diff options
context:
space:
mode:
authorPatrik Hagglund <patrik.h.hagglund@ericsson.com>2012-12-11 09:10:33 +0000
committerPatrik Hagglund <patrik.h.hagglund@ericsson.com>2012-12-11 09:10:33 +0000
commit8163ca76f0b0d336c5436364ffb3b85be1162e7a (patch)
treed72fbe0625682a4e3a2bdb5508db3f93eeb8cf5b /lib/Target/ARM/ARMISelLowering.cpp
parent659dacd66fce1cff13661976200f6c7125e38678 (diff)
downloadllvm-8163ca76f0b0d336c5436364ffb3b85be1162e7a.tar.gz
llvm-8163ca76f0b0d336c5436364ffb3b85be1162e7a.tar.bz2
llvm-8163ca76f0b0d336c5436364ffb3b85be1162e7a.tar.xz
Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.
Accordingly, add helper funtions getSimpleValueType (in parallel to getValueType) in SDValue, SDNode, and TargetLowering. This is the first, in a series of patches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169837 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 474eb32d39..159d4df00b 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -1046,7 +1046,7 @@ EVT ARMTargetLowering::getSetCCResultType(EVT VT) const {
/// getRegClassFor - Return the register class that should be used for the
/// specified value type.
-const TargetRegisterClass *ARMTargetLowering::getRegClassFor(EVT VT) const {
+const TargetRegisterClass *ARMTargetLowering::getRegClassFor(MVT VT) const {
// Map v4i64 to QQ registers but do not make the type legal. Similarly map
// v8i64 to QQQQ registers. v4i64 and v8i64 are only used for REG_SEQUENCE to
// load / store 4 to 8 consecutive D registers.