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author | James Molloy <james.molloy@arm.com> | 2012-02-09 10:56:31 +0000 |
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committer | James Molloy <james.molloy@arm.com> | 2012-02-09 10:56:31 +0000 |
commit | 3015dfb7d739f4cc0b1408555889ecea880ffac9 (patch) | |
tree | 79d02b8866c917e837cecea2f6e2ca42fa9a680c /lib/Target/ARM/ARMInstrFormats.td | |
parent | f41ab77847251f1ca88142b4e9cba597f9c094a8 (diff) | |
download | llvm-3015dfb7d739f4cc0b1408555889ecea880ffac9.tar.gz llvm-3015dfb7d739f4cc0b1408555889ecea880ffac9.tar.bz2 llvm-3015dfb7d739f4cc0b1408555889ecea880ffac9.tar.xz |
Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150169 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrFormats.td')
-rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 0c10b01b6c..81229f4779 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -290,6 +290,14 @@ class InstTemplate<AddrMode am, int sz, IndexMode im, class Encoding { field bits<32> Inst; + // Mask of bits that cause an encoding to be UNPREDICTABLE. + // If a bit is set, then if the corresponding bit in the + // target encoding differs from its value in the "Inst" field, + // the instruction is UNPREDICTABLE (SoftFail in abstract parlance). + field bits<32> Unpredictable = 0; + // SoftFail is the generic name for this field, but we alias it so + // as to make it more obvious what it means in ARM-land. + field bits<32> SoftFail = Unpredictable; } class InstARM<AddrMode am, int sz, IndexMode im, |