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| author | Jim Grosbach <grosbach@apple.com> | 2012-04-27 23:51:36 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-04-27 23:51:36 +0000 |
| commit | a9cc08f24f61e2663a131d7ac16c329b75162e7b (patch) | |
| tree | dc2b18dcff471f7b42d87e2fd3d06cac2bd4a38b /lib/Target/ARM/ARMInstrThumb.td | |
| parent | bb32f1d545241ab957f402165cec359d4473c0ca (diff) | |
| download | llvm-a9cc08f24f61e2663a131d7ac16c329b75162e7b.tar.gz llvm-a9cc08f24f61e2663a131d7ac16c329b75162e7b.tar.bz2 llvm-a9cc08f24f61e2663a131d7ac16c329b75162e7b.tar.xz | |
ARM: Thumb add(sp plus register) asm constraints.
Make sure when parsing the Thumb1 sp+register ADD instruction that
the source and destination operands match. In thumb2, just use the
wide encoding if they don't. In Thumb1, issue a diagnostic.
rdar://11219154
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155748 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrThumb.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 081c0abd6b..15cb9fa5d2 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -363,8 +363,8 @@ def : tInstAlias<"sub${p} sp, sp, $imm", (tSUBspi SP, t_imm0_508s4:$imm, pred:$p)>; // ADD <Rm>, sp -def tADDrSP : T1pIt<(outs GPR:$Rdn), (ins GPRsp:$sp, GPR:$Rn), IIC_iALUr, - "add", "\t$Rdn, $sp, $Rn", []>, +def tADDrSP : T1pI<(outs GPR:$Rdn), (ins GPRsp:$sp, GPR:$Rn), IIC_iALUr, + "add", "\t$Rdn, $sp, $Rn", []>, T1Special<{0,0,?,?}> { // A8.6.9 Encoding T1 bits<4> Rdn; |