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authorJim Grosbach <grosbach@apple.com>2011-09-20 00:10:37 +0000
committerJim Grosbach <grosbach@apple.com>2011-09-20 00:10:37 +0000
commitabb8aacef279a468c4ee9e111a5a95064f3de4ff (patch)
tree689f43bf3e77affdeba9c3385052bafad1229866 /lib/Target/ARM/ARMInstrThumb.td
parent278cbfb3f5dc0d96682144c03197d9e3671bb28d (diff)
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Thumb1 convenience aliases for disassembler round-trip testing. CPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140108 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrThumb.td')
-rw-r--r--lib/Target/ARM/ARMInstrThumb.td8
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index 0748cbf0a9..4a7e6a1c6a 100644
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -1426,3 +1426,11 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
// In Thumb1, "nop" is encoded as a "mov r8, r8". Technically, the bf00
// encoding is available on ARMv6K, but we don't differentiate that finely.
def : InstAlias<"nop", (tMOVr R8, R8, 14, 0)>,Requires<[IsThumb, IsThumb1Only]>;
+
+
+// For round-trip assembly/disassembly, we have to handle a CPS instruction
+// without any iflags. That's not, strictly speaking, valid syntax, but it's
+// a useful extention and assembles to defined behaviour (the insn does
+// nothing).
+def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>;
+def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>;