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| author | Joey Gouly <joey.gouly@arm.com> | 2013-09-05 15:35:24 +0000 |
|---|---|---|
| committer | Joey Gouly <joey.gouly@arm.com> | 2013-09-05 15:35:24 +0000 |
| commit | 4897151df698197f0eb5c4085545312dbb20c94d (patch) | |
| tree | c01a96e1254455cb74d6ebcdf1993bdee36c7a31 /lib/Target/ARM/ARMInstrThumb2.td | |
| parent | b5523ce1bb50e86942ad5273e3a89872c4d26b73 (diff) | |
| download | llvm-4897151df698197f0eb5c4085545312dbb20c94d.tar.gz llvm-4897151df698197f0eb5c4085545312dbb20c94d.tar.bz2 llvm-4897151df698197f0eb5c4085545312dbb20c94d.tar.xz | |
[ARMv8] Implement the new DMB/DSB operands.
This removes the custom ISD Node: MEMBARRIER and replaces it
with an intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190055 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrThumb2.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 5ba14cfa9f..83edf16e07 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -3155,7 +3155,7 @@ def t2MOVCCi32imm // memory barriers protect the atomic sequences let hasSideEffects = 1 in { def t2DMB : T2I<(outs), (ins memb_opt:$opt), NoItinerary, - "dmb", "\t$opt", [(ARMMemBarrier (i32 imm:$opt))]>, + "dmb", "\t$opt", [(int_arm_dmb (i32 imm0_15:$opt))]>, Requires<[HasDB]> { bits<4> opt; let Inst{31-4} = 0xf3bf8f5; @@ -3164,7 +3164,8 @@ def t2DMB : T2I<(outs), (ins memb_opt:$opt), NoItinerary, } def t2DSB : T2I<(outs), (ins memb_opt:$opt), NoItinerary, - "dsb", "\t$opt", []>, Requires<[HasDB]> { + "dsb", "\t$opt", [(int_arm_dsb (i32 imm0_15:$opt))]>, + Requires<[HasDB]> { bits<4> opt; let Inst{31-4} = 0xf3bf8f4; let Inst{3-0} = opt; |