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| author | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2013-10-23 10:14:40 +0000 |
|---|---|---|
| committer | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2013-10-23 10:14:40 +0000 |
| commit | b161955ffbda5ccb5293e0c76ef982acb6ec6661 (patch) | |
| tree | cd41ea9737b88f53f7bce2f6e15c8628071c19df /lib/Target/ARM/ARMInstrThumb2.td | |
| parent | 2c6e1cf1dd4d0789118f9761e23885dda94296e1 (diff) | |
| download | llvm-b161955ffbda5ccb5293e0c76ef982acb6ec6661.tar.gz llvm-b161955ffbda5ccb5293e0c76ef982acb6ec6661.tar.bz2 llvm-b161955ffbda5ccb5293e0c76ef982acb6ec6661.tar.xz | |
Make ARM hint ranges consistent, and add tests for these ranges
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193238 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrThumb2.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 67dc4c12c3..dad334845e 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -3653,13 +3653,13 @@ def : t2InstAlias<"cps.w $mode", (t2CPS1p imm0_31:$mode), 0>; // A6.3.4 Branches and miscellaneous control // Table A6-14 Change Processor State, and hint instructions -def t2HINT : T2I<(outs), (ins imm0_255:$imm), NoItinerary, "hint.w", "\t$imm",[]> { - bits<3> imm; +def t2HINT : T2I<(outs), (ins imm0_239:$imm), NoItinerary, "hint", ".w\t$imm",[]> { + bits<8> imm; let Inst{31-3} = 0b11110011101011111000000000000; - let Inst{2-0} = imm; + let Inst{7-0} = imm; } -def : t2InstAlias<"hint$p.w $imm", (t2HINT imm0_255:$imm, pred:$p)>; +def : t2InstAlias<"hint$p $imm", (t2HINT imm0_239:$imm, pred:$p)>; def : t2InstAlias<"nop$p.w", (t2HINT 0, pred:$p)>; def : t2InstAlias<"yield$p.w", (t2HINT 1, pred:$p)>; def : t2InstAlias<"wfe$p.w", (t2HINT 2, pred:$p)>; |