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authorJim Grosbach <grosbach@apple.com>2010-09-14 20:41:27 +0000
committerJim Grosbach <grosbach@apple.com>2010-09-14 20:41:27 +0000
commit1685caffedd0d0b351e0ec475d2529d90efec2fd (patch)
tree492e0e2ec746801cb315665aee5111beb92c1c1d /lib/Target/ARM/ARMMCInstLower.cpp
parent9854f197f3385713c77df8cea0e39a231b91a650 (diff)
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Don't ignore the CPSR implicit def when lowering a MachineInstruction to an MCInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113847 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMMCInstLower.cpp')
-rw-r--r--lib/Target/ARM/ARMMCInstLower.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMMCInstLower.cpp b/lib/Target/ARM/ARMMCInstLower.cpp
index 5d840be46b..41af0889d7 100644
--- a/lib/Target/ARM/ARMMCInstLower.cpp
+++ b/lib/Target/ARM/ARMMCInstLower.cpp
@@ -12,6 +12,7 @@
//
//===----------------------------------------------------------------------===//
+#include "ARM.h"
#include "ARMMCInstLower.h"
//#include "llvm/CodeGen/MachineModuleInfoImpls.h"
#include "llvm/CodeGen/AsmPrinter.h"
@@ -126,8 +127,8 @@ void ARMMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
MI->dump();
assert(0 && "unknown operand type");
case MachineOperand::MO_Register:
- // Ignore all implicit register operands.
- if (MO.isImplicit()) continue;
+ // Ignore all non-CPSR implicit register operands.
+ if (MO.isImplicit() && MO.getReg() != ARM::CPSR) continue;
assert(!MO.getSubReg() && "Subregs should be eliminated!");
MCOp = MCOperand::CreateReg(MO.getReg());
break;