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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-02 23:07:24 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-02 23:07:24 +0000 |
| commit | 4f3fb6d08be511a277f92279e803ae6e95b00126 (patch) | |
| tree | 1906d63cdd31b8c9ced9a5ff0032778404623d5e /lib/Target/ARM/ARMRegisterInfo.td | |
| parent | f462e3fac7ac67503657d63dc35330d0b19359b3 (diff) | |
| download | llvm-4f3fb6d08be511a277f92279e803ae6e95b00126.tar.gz llvm-4f3fb6d08be511a277f92279e803ae6e95b00126.tar.bz2 llvm-4f3fb6d08be511a277f92279e803ae6e95b00126.tar.xz | |
Flag unallocatable register classes instead of giving them empty
allocation orders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132509 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMRegisterInfo.td')
| -rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.td | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.td b/lib/Target/ARM/ARMRegisterInfo.td index 962158580c..99418733c3 100644 --- a/lib/Target/ARM/ARMRegisterInfo.td +++ b/lib/Target/ARM/ARMRegisterInfo.td @@ -540,4 +540,6 @@ def QQQQPR : RegisterClass<"ARM", [v8i64], } // Condition code registers. -def CCR : RegisterClass<"ARM", [i32], 32, [CPSR]>; +def CCR : RegisterClass<"ARM", [i32], 32, [CPSR]> { + let isAllocatable = 0; +} |