diff options
author | Evan Cheng <evan.cheng@apple.com> | 2010-08-10 06:26:49 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2010-08-10 06:26:49 +0000 |
commit | c9aed19747608b7688a64f2f382a008889f8e57d (patch) | |
tree | 4b02044afb655cdcef591720814532993649b82c /lib/Target/ARM/ARMRegisterInfo.td | |
parent | 94f7950e4d68399954d4ee651ffa6674b87ff299 (diff) | |
download | llvm-c9aed19747608b7688a64f2f382a008889f8e57d.tar.gz llvm-c9aed19747608b7688a64f2f382a008889f8e57d.tar.bz2 llvm-c9aed19747608b7688a64f2f382a008889f8e57d.tar.xz |
Fix ARM hasFP() semantics. It should return true whenever FP register is
reserved, not available for general allocation. This eliminates all the
extra checks for Darwin.
This change also fixes the use of FP to access frame indices in leaf
functions and cleaned up some confusing code in epilogue emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110655 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMRegisterInfo.td')
-rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.td | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.td b/lib/Target/ARM/ARMRegisterInfo.td index 5e17175b97..2b72739c30 100644 --- a/lib/Target/ARM/ARMRegisterInfo.td +++ b/lib/Target/ARM/ARMRegisterInfo.td @@ -294,8 +294,7 @@ def GPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6, if (Subtarget.isThumb1Only()) { I = THUMB_GPR_AO + (sizeof(THUMB_GPR_AO)/sizeof(unsigned)); - // Mac OS X requires FP not to be clobbered for backtracing purpose. - return (Subtarget.isTargetDarwin() || RI->hasFP(MF)) ? I-1 : I; + return RI->hasFP(MF) ? I-1 : I; } if (Subtarget.isTargetDarwin()) { @@ -312,8 +311,7 @@ def GPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6, I = ARM_GPR_AO_1 + (sizeof(ARM_GPR_AO_1)/sizeof(unsigned)); } - // Mac OS X requires FP not to be clobbered for backtracing purpose. - return (Subtarget.isTargetDarwin() || RI->hasFP(MF)) ? I-1 : I; + return RI->hasFP(MF) ? I-1 : I; } }]; } @@ -403,8 +401,7 @@ def rGPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6, if (Subtarget.isThumb1Only()) { I = THUMB_rGPRAO + (sizeof(THUMB_rGPRAO)/sizeof(unsigned)); - // Mac OS X requires FP not to be clobbered for backtracing purpose. - return (Subtarget.isTargetDarwin() || RI->hasFP(MF)) ? I-1 : I; + return RI->hasFP(MF) ? I-1 : I; } if (Subtarget.isTargetDarwin()) { @@ -421,8 +418,7 @@ def rGPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6, I = ARM_rGPRAO_1 + (sizeof(ARM_rGPRAO_1)/sizeof(unsigned)); } - // Mac OS X requires FP not to be clobbered for backtracing purpose. - return (Subtarget.isTargetDarwin() || RI->hasFP(MF)) ? I-1 : I; + return RI->hasFP(MF) ? I-1 : I; } }]; } @@ -449,11 +445,9 @@ def tGPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6, R7]> { tGPRClass::allocation_order_end(const MachineFunction &MF) const { const TargetMachine &TM = MF.getTarget(); const TargetRegisterInfo *RI = TM.getRegisterInfo(); - const ARMSubtarget &Subtarget = TM.getSubtarget<ARMSubtarget>(); tGPRClass::iterator I = THUMB_tGPR_AO + (sizeof(THUMB_tGPR_AO)/sizeof(unsigned)); - // Mac OS X requires FP not to be clobbered for backtracing purpose. - return (Subtarget.isTargetDarwin() || RI->hasFP(MF)) ? I-1 : I; + return RI->hasFP(MF) ? I-1 : I; } }]; } |