summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARMSchedule.td
diff options
context:
space:
mode:
authorArnold Schwaighofer <aschwaighofer@apple.com>2013-06-06 20:26:18 +0000
committerArnold Schwaighofer <aschwaighofer@apple.com>2013-06-06 20:26:18 +0000
commit5be946b4866989cddf16fd3d1977da3c77351098 (patch)
treedc4b6ee7996f897086c1cfda238fb03333ba6dbf /lib/Target/ARM/ARMSchedule.td
parent3facc43ff69947f744f2a7b6ed94649ccb44df02 (diff)
downloadllvm-5be946b4866989cddf16fd3d1977da3c77351098.tar.gz
llvm-5be946b4866989cddf16fd3d1977da3c77351098.tar.bz2
llvm-5be946b4866989cddf16fd3d1977da3c77351098.tar.xz
ARM sched model: Add integer VFP/SIMD instructions on Swift
Reapply 183269. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183441 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMSchedule.td')
-rw-r--r--lib/Target/ARM/ARMSchedule.td3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMSchedule.td b/lib/Target/ARM/ARMSchedule.td
index f25e9c2e2a..528c4ec737 100644
--- a/lib/Target/ARM/ARMSchedule.td
+++ b/lib/Target/ARM/ARMSchedule.td
@@ -84,6 +84,9 @@ def WriteBrTbl : SchedWrite;
// Fixpoint conversions.
def WriteCvtFP : SchedWrite;
+// Noop.
+def WriteNoop : SchedWrite;
+
// Define TII for use in SchedVariant Predicates.
def : PredicateProlog<[{
const ARMBaseInstrInfo *TII =