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authorEvan Cheng <evan.cheng@apple.com>2010-10-28 06:47:08 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-10-28 06:47:08 +0000
commit7e2fe9150f905167f6685c9730911c2abc08293c (patch)
tree4f1798b4cd67ec0d9f7b57e55988c99cd867863f /lib/Target/ARM/ARMScheduleA9.td
parent9c3e8e28bd236e95117a25f07d3b466d2db80285 (diff)
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Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMScheduleA9.td')
-rw-r--r--lib/Target/ARM/ARMScheduleA9.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMScheduleA9.td b/lib/Target/ARM/ARMScheduleA9.td
index 548bc7cd60..20aa64163b 100644
--- a/lib/Target/ARM/ARMScheduleA9.td
+++ b/lib/Target/ARM/ARMScheduleA9.td
@@ -574,7 +574,7 @@ def CortexA9Itineraries : ProcessorItineraries<
InstrStage<1, [A9_DRegsVFP], 0, Required>,
InstrStage<9, [A9_DRegsN], 0, Reserved>,
InstrStage<1, [A9_NPipe]>],
- [8, 0, 1, 1]>,
+ [8, 1, 1, 1]>,
//
// Double-precision FP MAC
InstrItinData<IIC_fpMAC64 , [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -582,7 +582,7 @@ def CortexA9Itineraries : ProcessorItineraries<
InstrStage<1, [A9_DRegsVFP], 0, Required>,
InstrStage<10, [A9_DRegsN], 0, Reserved>,
InstrStage<2, [A9_NPipe]>],
- [9, 0, 1, 1]>,
+ [9, 1, 1, 1]>,
//
// Single-precision FP DIV
InstrItinData<IIC_fpDIV32 , [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,