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authorEvan Cheng <evan.cheng@apple.com>2010-11-03 06:34:55 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-11-03 06:34:55 +0000
commitdfed19fe2c34c1209108afa58e8ab014ffd894e2 (patch)
tree5f1825a4f721f61f4bd5908abe7ea515a08da5dc /lib/Target/ARM/ARMScheduleA9.td
parentbc7deb0f758d2544fc4c36433668340cbf4835cf (diff)
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Fix preload instruction isel. Only v7 supports pli, and only v7 with mp extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118160 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMScheduleA9.td')
-rw-r--r--lib/Target/ARM/ARMScheduleA9.td4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMScheduleA9.td b/lib/Target/ARM/ARMScheduleA9.td
index d5ab5dcc87..bc325b1ec4 100644
--- a/lib/Target/ARM/ARMScheduleA9.td
+++ b/lib/Target/ARM/ARMScheduleA9.td
@@ -402,6 +402,10 @@ def CortexA9Itineraries : ProcessorItineraries<
InstrStage<1, [A9_AGU], 0>,
InstrStage<2, [A9_LSUnit]>], [2]>,
+ //
+ // Preload
+ InstrItinData<IIC_Preload, [InstrStage<1, [A9_Issue0, A9_Issue1]>], [1, 1]>,
+
// Branch
//
// no delay slots, so the latency of a branch is unimportant