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authorTim Northover <tnorthover@apple.com>2013-10-25 09:30:24 +0000
committerTim Northover <tnorthover@apple.com>2013-10-25 09:30:24 +0000
commit214c37d1816b62a25525282817f7088a1e2ed1dc (patch)
tree86ca829469e85c4e457480afd50f0cc8de3bdcba /lib/Target/ARM/ARMSubtarget.h
parent5a42ae81f742aaab826b7a72cb0a9a7e5a957a07 (diff)
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ARM: don't expand atomicrmw inline on Cortex-M0
There's a barrier instruction so that should still be used, but most actual atomic operations are going to need a platform decision on the correct behaviour (either nop if single-threaded or OS-support otherwise). rdar://problem/15287210 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193399 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMSubtarget.h')
-rw-r--r--lib/Target/ARM/ARMSubtarget.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h
index 9cc3a71f89..b9a55fb691 100644
--- a/lib/Target/ARM/ARMSubtarget.h
+++ b/lib/Target/ARM/ARMSubtarget.h
@@ -263,6 +263,9 @@ public:
bool hasDivideInARMMode() const { return HasHardwareDivideInARM; }
bool hasT2ExtractPack() const { return HasT2ExtractPack; }
bool hasDataBarrier() const { return HasDataBarrier; }
+ bool hasAnyDataBarrier() const {
+ return HasDataBarrier || (hasV6Ops() && !isThumb());
+ }
bool useMulOps() const { return UseMulOps; }
bool useFPVMLx() const { return !SlowFPVMLx; }
bool hasVMLxForwarding() const { return HasVMLxForwarding; }