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| author | Kevin Enderby <enderby@apple.com> | 2012-04-11 00:25:40 +0000 |
|---|---|---|
| committer | Kevin Enderby <enderby@apple.com> | 2012-04-11 00:25:40 +0000 |
| commit | a69da35c127dd7e35ae6216d965670643dc55bb6 (patch) | |
| tree | 51d49ffbe0c018819d5c86bc41d7b60ababf935e /lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | a5378ebe7890aa9a4974f2872aa6632f1b7f2400 (diff) | |
| download | llvm-a69da35c127dd7e35ae6216d965670643dc55bb6.tar.gz llvm-a69da35c127dd7e35ae6216d965670643dc55bb6.tar.bz2 llvm-a69da35c127dd7e35ae6216d965670643dc55bb6.tar.xz | |
Fix ARM disassembly of VLD instructions with writebacks. And add test a case
for all opcodes handed by DecodeVLDInstruction() in ARMDisassembler.cpp .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154459 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index dba5b6ef82..e1d63fac90 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -2262,6 +2262,8 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, case ARM::VLD2b8wb_register: case ARM::VLD2b16wb_register: case ARM::VLD2b32wb_register: + Inst.addOperand(MCOperand::CreateImm(0)); + break; case ARM::VLD3d8_UPD: case ARM::VLD3d16_UPD: case ARM::VLD3d32_UPD: @@ -2330,6 +2332,16 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, !Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler::Fail; break; + case ARM::VLD2d8wb_fixed: + case ARM::VLD2d16wb_fixed: + case ARM::VLD2d32wb_fixed: + case ARM::VLD2b8wb_fixed: + case ARM::VLD2b16wb_fixed: + case ARM::VLD2b32wb_fixed: + case ARM::VLD2q8wb_fixed: + case ARM::VLD2q16wb_fixed: + case ARM::VLD2q32wb_fixed: + break; } return S; |