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authorOwen Anderson <resistor@mac.com>2011-11-02 18:03:14 +0000
committerOwen Anderson <resistor@mac.com>2011-11-02 18:03:14 +0000
commit81550dc0a866e27a1efbc5de616fb366ebb547cd (patch)
tree2f98498bb747fc378c03ed8ada03274e41a5d593 /lib/Target/ARM/InstPrinter
parentdba9a17f9a69d16264ab30cfd878f2e74ba36d26 (diff)
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Fix the issue that r143552 was trying to address the _right_ way. One-register lists are legal on LDM/STM instructions, but we should not print the PUSH/POP aliases when they appear. This fixes round tripping on this instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143557 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/InstPrinter')
-rw-r--r--lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index e4a56be9e4..844e3ab177 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -101,7 +101,9 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
// A8.6.123 PUSH
if ((Opcode == ARM::STMDB_UPD || Opcode == ARM::t2STMDB_UPD) &&
- MI->getOperand(0).getReg() == ARM::SP) {
+ MI->getOperand(0).getReg() == ARM::SP &&
+ MI->getNumOperands() > 5) {
+ // Should only print PUSH if there are at least two registers in the list.
O << '\t' << "push";
printPredicateOperand(MI, 2, O);
if (Opcode == ARM::t2STMDB_UPD)
@@ -122,7 +124,9 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
// A8.6.122 POP
if ((Opcode == ARM::LDMIA_UPD || Opcode == ARM::t2LDMIA_UPD) &&
- MI->getOperand(0).getReg() == ARM::SP) {
+ MI->getOperand(0).getReg() == ARM::SP &&
+ MI->getNumOperands() > 5) {
+ // Should only print POP if there are at least two registers in the list.
O << '\t' << "pop";
printPredicateOperand(MI, 2, O);
if (Opcode == ARM::t2LDMIA_UPD)