summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
diff options
context:
space:
mode:
authorBill Wendling <isanbard@gmail.com>2013-06-18 07:20:20 +0000
committerBill Wendling <isanbard@gmail.com>2013-06-18 07:20:20 +0000
commit99cb622041a0839c7dfcf0263c5102a305a0fdb5 (patch)
tree7890d4314940f3ef004cd8c2877343f14620a69a /lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
parentc4e6b540f05932eea37ca10b6c1fded522777954 (diff)
downloadllvm-99cb622041a0839c7dfcf0263c5102a305a0fdb5.tar.gz
llvm-99cb622041a0839c7dfcf0263c5102a305a0fdb5.tar.bz2
llvm-99cb622041a0839c7dfcf0263c5102a305a0fdb5.tar.xz
Use pointers to the MCAsmInfo and MCRegInfo.
Someone may want to do something crazy, like replace these objects if they change or something. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184175 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp')
-rw-r--r--lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 679d3c4a85..dc3d945656 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -380,10 +380,10 @@ void ARMELFStreamer::FlushPendingOffset() {
void ARMELFStreamer::FlushUnwindOpcodes(bool AllowCompactModel0) {
// Emit the unwind opcode to restore $sp.
if (UsedFP) {
- const MCRegisterInfo &MRI = getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = getContext().getRegisterInfo();
int64_t LastRegSaveSPOffset = SPOffset - PendingOffset;
UnwindOpAsm.EmitSPOffset(LastRegSaveSPOffset - FPOffset);
- UnwindOpAsm.EmitSetSP(MRI.getEncodingValue(FPReg));
+ UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg));
} else {
FlushPendingOffset();
}
@@ -458,9 +458,9 @@ void ARMELFStreamer::EmitRegSave(const SmallVectorImpl<unsigned> &RegList,
// Collect the registers in the register list
unsigned Count = 0;
uint32_t Mask = 0;
- const MCRegisterInfo &MRI = getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = getContext().getRegisterInfo();
for (size_t i = 0; i < RegList.size(); ++i) {
- unsigned Reg = MRI.getEncodingValue(RegList[i]);
+ unsigned Reg = MRI->getEncodingValue(RegList[i]);
assert(Reg < (IsVector ? 32U : 16U) && "Register out of range");
unsigned Bit = (1u << Reg);
if ((Mask & Bit) == 0) {