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author | Evan Cheng <evan.cheng@apple.com> | 2011-07-13 01:33:00 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-13 01:33:00 +0000 |
commit | 3b737081e49ef7d640d50285b6cb5f686c75f63d (patch) | |
tree | 5decfcff2e841118272b8b7b33ef98d10fedc093 /lib/Target/ARM/README.txt | |
parent | 61905f0139bbcd59ad361aaff880ca0bbb5cc776 (diff) | |
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135024 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/README.txt')
-rw-r--r-- | lib/Target/ARM/README.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/Target/ARM/README.txt b/lib/Target/ARM/README.txt index 8ba9a27e95..2f6842e8cb 100644 --- a/lib/Target/ARM/README.txt +++ b/lib/Target/ARM/README.txt @@ -681,3 +681,21 @@ is compiled and optimized to: str r1, [r0] //===---------------------------------------------------------------------===// + +Improve codegen for select's: +if (x != 0) x = 1 +if (x == 1) x = 1 + +ARM codegen used to look like this: + mov r1, r0 + cmp r1, #1 + mov r0, #0 + moveq r0, #1 + +The naive lowering select between two different values. It should recognize the +test is equality test so it's more a conditional move rather than a select: + cmp r0, #1 + movne r0, #0 + +Currently this is a ARM specific dag combine. We probably should make it into a +target-neutral one. |