summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/README.txt
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2007-04-17 18:03:00 +0000
committerChris Lattner <sabre@nondot.org>2007-04-17 18:03:00 +0000
commit3c30d10b0484349d837d21490181600f5ebee6cd (patch)
tree77878d3b6e47b13e6991f5e81c2498a41b326a39 /lib/Target/ARM/README.txt
parente24c92a6984e0ddcf565bba23de4d5cb531c6c17 (diff)
downloadllvm-3c30d10b0484349d837d21490181600f5ebee6cd.tar.gz
llvm-3c30d10b0484349d837d21490181600f5ebee6cd.tar.bz2
llvm-3c30d10b0484349d837d21490181600f5ebee6cd.tar.xz
add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36203 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/README.txt')
-rw-r--r--lib/Target/ARM/README.txt43
1 files changed, 43 insertions, 0 deletions
diff --git a/lib/Target/ARM/README.txt b/lib/Target/ARM/README.txt
index 8af07ccffb..417f4a30c3 100644
--- a/lib/Target/ARM/README.txt
+++ b/lib/Target/ARM/README.txt
@@ -476,3 +476,46 @@ More LSR enhancements possible:
in a load / store.
2. Allow iv reuse even when a type conversion is required. For example, i8
and i32 load / store addressing modes are identical.
+
+
+//===---------------------------------------------------------------------===//
+
+This:
+
+int foo(int a, int b, int c, int d) {
+ long long acc = (long long)a * (long long)b;
+ acc += (long long)c * (long long)d;
+ return (int)(acc >> 32);
+}
+
+Should compile to use SMLAL (Signed Multiply Accumulate Long) which multiplies
+two signed 32-bit values to produce a 64-bit value, and accumulates this with
+a 64-bit value.
+
+We currently get this with v6:
+
+_foo:
+ mul r12, r1, r0
+ smmul r1, r1, r0
+ smmul r0, r3, r2
+ mul r3, r3, r2
+ adds r3, r3, r12
+ adc r0, r0, r1
+ bx lr
+
+and this with v4:
+
+_foo:
+ stmfd sp!, {r7, lr}
+ mov r7, sp
+ mul r12, r1, r0
+ smull r0, r1, r1, r0
+ smull lr, r0, r3, r2
+ mul r3, r3, r2
+ adds r3, r3, r12
+ adc r0, r0, r1
+ ldmfd sp!, {r7, pc}
+
+This apparently occurs in real code.
+
+//===---------------------------------------------------------------------===//