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authorChris Lattner <sabre@nondot.org>2010-02-17 18:42:24 +0000
committerChris Lattner <sabre@nondot.org>2010-02-17 18:42:24 +0000
commit7180f10fc78a0b8cdf93cc6293de977b6899f686 (patch)
tree95d219bc750b5c0222647043d8505103993ae266 /lib/Target/ARM/README.txt
parent46d1ddd13c1529fd669c7c66fa8bea54f26188ba (diff)
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add a note, from PR5100
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96490 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/README.txt')
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diff --git a/lib/Target/ARM/README.txt b/lib/Target/ARM/README.txt
index 9efb5a1426..57b65cf15d 100644
--- a/lib/Target/ARM/README.txt
+++ b/lib/Target/ARM/README.txt
@@ -10,6 +10,8 @@ Reimplement 'select' in terms of 'SEL'.
* Implement pre/post increment support. (e.g. PR935)
* Implement smarter constant generation for binops with large immediates.
+A few ARMv6T2 ops should be pattern matched: BFI, SBFX, and UBFX
+
//===---------------------------------------------------------------------===//
Crazy idea: Consider code that uses lots of 8-bit or 16-bit values. By the