summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/Thumb1FrameLowering.cpp
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2011-06-30 23:38:17 +0000
committerJim Grosbach <grosbach@apple.com>2011-06-30 23:38:17 +0000
commit2a7b41ba4d3eb3c6003f6768dc20b28d83eac265 (patch)
tree74d0d6ab330b8b4317e30390e0145a8b6bfe934e /lib/Target/ARM/Thumb1FrameLowering.cpp
parent73744df0c467895bac9e25d5c62f34a0a8fcc4f9 (diff)
downloadllvm-2a7b41ba4d3eb3c6003f6768dc20b28d83eac265.tar.gz
llvm-2a7b41ba4d3eb3c6003f6768dc20b28d83eac265.tar.bz2
llvm-2a7b41ba4d3eb3c6003f6768dc20b28d83eac265.tar.xz
Refact ARM Thumb1 tMOVr instruction family.
Merge the tMOVr, tMOVgpr2tgpr, tMOVtgpr2gpr, and tMOVgpr2gpr instructions into tMOVr. There's no need to keep them separate. Giving the tMOVr instruction the proper GPR register class for its operands is sufficient to give the register allocator enough information to do the right thing directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134204 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb1FrameLowering.cpp')
-rw-r--r--lib/Target/ARM/Thumb1FrameLowering.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/Thumb1FrameLowering.cpp b/lib/Target/ARM/Thumb1FrameLowering.cpp
index 326d4af198..48211d852f 100644
--- a/lib/Target/ARM/Thumb1FrameLowering.cpp
+++ b/lib/Target/ARM/Thumb1FrameLowering.cpp
@@ -160,7 +160,7 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
// will be allocated after this, so we can still use the base pointer
// to reference locals.
if (RegInfo->hasBasePointer(MF))
- AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVgpr2gpr), BasePtr)
+ AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
.addReg(ARM::SP));
// If the frame has variable sized objects then the epilogue must restore
@@ -240,11 +240,11 @@ void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF,
"No scratch register to restore SP from FP!");
emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
TII, *RegInfo);
- AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVtgpr2gpr),
+ AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
ARM::SP)
.addReg(ARM::R4));
} else
- AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVtgpr2gpr),
+ AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
ARM::SP)
.addReg(FramePtr));
} else {