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authorJim Grosbach <grosbach@apple.com>2010-12-15 23:52:36 +0000
committerJim Grosbach <grosbach@apple.com>2010-12-15 23:52:36 +0000
commit3e333637f172c30adf5c8333b592fbde17ff9f78 (patch)
tree61a04c7237ad7936b0b7f31948e6023229fc3f74 /lib/Target/ARM/Thumb1RegisterInfo.cpp
parent836c6245ad7e8f2b9f72c2a9e4cb1df101eaf2c7 (diff)
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Thumb1 had two patterns for the same load-from-constant-pool instruction.
Canonicalize on tLDRpci and remove tLDRcp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121920 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb1RegisterInfo.cpp')
-rw-r--r--lib/Target/ARM/Thumb1RegisterInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/Thumb1RegisterInfo.cpp b/lib/Target/ARM/Thumb1RegisterInfo.cpp
index 41a9cf3bf1..4e77bd87cc 100644
--- a/lib/Target/ARM/Thumb1RegisterInfo.cpp
+++ b/lib/Target/ARM/Thumb1RegisterInfo.cpp
@@ -63,7 +63,7 @@ void Thumb1RegisterInfo::emitLoadConstPool(MachineBasicBlock &MBB,
Type::getInt32Ty(MBB.getParent()->getFunction()->getContext()), Val);
unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4);
- BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRcp))
+ BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci))
.addReg(DestReg, getDefRegState(true), SubIdx)
.addConstantPoolIndex(Idx).addImm(Pred).addReg(PredReg);
}