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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-04-26 18:52:33 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-04-26 18:52:33 +0000
commitc9e5015dece0a1a73bec358e11bc87594831279d (patch)
tree2536ec8e3e79a76982d4f03238684978ea691682 /lib/Target/ARM/Thumb1RegisterInfo.h
parentefa81404a52020652c4c06499acc29af547b1392 (diff)
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Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on register class inflation.
The hook will be used by the register allocator when recomputing register classes after removing constraints. Thumb1 code doesn't allow anything larger than tGPR, and x86 needs to ensure that the spill size doesn't change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130228 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb1RegisterInfo.h')
-rw-r--r--lib/Target/ARM/Thumb1RegisterInfo.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/Thumb1RegisterInfo.h b/lib/Target/ARM/Thumb1RegisterInfo.h
index b4fdd67b7f..9060e59e59 100644
--- a/lib/Target/ARM/Thumb1RegisterInfo.h
+++ b/lib/Target/ARM/Thumb1RegisterInfo.h
@@ -28,6 +28,9 @@ struct Thumb1RegisterInfo : public ARMBaseRegisterInfo {
public:
Thumb1RegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI);
+ const TargetRegisterClass*
+ getLargestLegalSuperClass(const TargetRegisterClass *RC) const;
+
const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
/// emitLoadConstPool - Emits a load from constpool to materialize the