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| author | Tim Northover <tnorthover@apple.com> | 2013-11-05 21:36:02 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-11-05 21:36:02 +0000 |
| commit | f635ab8eabb06a41fa791d897ebf32eb338688a0 (patch) | |
| tree | 08037bc1a4300f94b39bcfe607c53376f19ca67b /lib/Target/ARM | |
| parent | 5f5095e3dce0386658481353d93c11ca6123bb95 (diff) | |
| download | llvm-f635ab8eabb06a41fa791d897ebf32eb338688a0.tar.gz llvm-f635ab8eabb06a41fa791d897ebf32eb338688a0.tar.bz2 llvm-f635ab8eabb06a41fa791d897ebf32eb338688a0.tar.xz | |
ARM: permit bare dmb/dsb/isb aliases on Cortex-M0
Cortex-M0 supports these 32-bit instructions despite being Thumb1 only
(mostly). We knew about that but not that the aliases without the default "sy"
operand were also permitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194094 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index f09b65fd52..725e5054f7 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -4329,9 +4329,9 @@ def : t2InstAlias<"tst${p} $Rn, $Rm", (t2TSTrr GPRnopc:$Rn, rGPR:$Rm, pred:$p)>; // Memory barriers -def : InstAlias<"dmb${p}", (t2DMB 0xf, pred:$p)>, Requires<[IsThumb2, HasDB]>; -def : InstAlias<"dsb${p}", (t2DSB 0xf, pred:$p)>, Requires<[IsThumb2, HasDB]>; -def : InstAlias<"isb${p}", (t2ISB 0xf, pred:$p)>, Requires<[IsThumb2, HasDB]>; +def : InstAlias<"dmb${p}", (t2DMB 0xf, pred:$p)>, Requires<[HasDB]>; +def : InstAlias<"dsb${p}", (t2DSB 0xf, pred:$p)>, Requires<[HasDB]>; +def : InstAlias<"isb${p}", (t2ISB 0xf, pred:$p)>, Requires<[HasDB]>; // Alias for LDR, LDRB, LDRH, LDRSB, and LDRSH without the ".w" optional // width specifier. |