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author | Sirish Pande <spande@codeaurora.org> | 2012-05-03 16:18:50 +0000 |
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committer | Sirish Pande <spande@codeaurora.org> | 2012-05-03 16:18:50 +0000 |
commit | 71d56462a1bc885c97321eff2fc4b481fd3bf452 (patch) | |
tree | e1edcd80badf214ddf459f95a9a3c732e44ed4da /lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | |
parent | a199e01d8edd54f995dfd673e4fb6607fbeb09f9 (diff) | |
download | llvm-71d56462a1bc885c97321eff2fc4b481fd3bf452.tar.gz llvm-71d56462a1bc885c97321eff2fc4b481fd3bf452.tar.bz2 llvm-71d56462a1bc885c97321eff2fc4b481fd3bf452.tar.xz |
Extensions of Hexagon V4 instructions.
This adds new instructions for Hexagon V4 architecture.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156071 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonISelDAGToDAG.cpp')
-rw-r--r-- | lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp index e3520c401e..05bb4b224f 100644 --- a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp +++ b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp @@ -375,7 +375,7 @@ SDNode *HexagonDAGToDAGISel::SelectIndexedLoadSignExtend64(LoadSDNode *LD, }; ReplaceUses(Froms, Tos, 3); return Result_2; - } + } SDValue TargetConst0 = CurDAG->getTargetConstant(0, MVT::i32); SDValue TargetConstVal = CurDAG->getTargetConstant(Val, MVT::i32); SDNode *Result_1 = CurDAG->getMachineNode(Opcode, dl, MVT::i32, @@ -723,7 +723,7 @@ SDNode *HexagonDAGToDAGISel::SelectStore(SDNode *N) { if (AM != ISD::UNINDEXED) { return SelectIndexedStore(ST, dl); } - + return SelectBaseOffsetStore(ST, dl); } @@ -1215,7 +1215,7 @@ SDNode *HexagonDAGToDAGISel::SelectAdd(SDNode *N) { // Build Rd = Rd' + asr(Rs, Rt). The machine constraints will ensure that // Rd and Rd' are assigned to the same register - SDNode* Result = CurDAG->getMachineNode(Hexagon::ASR_rr_acc, dl, MVT::i32, + SDNode* Result = CurDAG->getMachineNode(Hexagon::ASR_ADD_rr, dl, MVT::i32, N->getOperand(1), Src1->getOperand(0), Src1->getOperand(1)); |