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authorBenjamin Kramer <benny.kra@googlemail.com>2011-12-18 12:00:09 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2011-12-18 12:00:09 +0000
commit4c1ea552c54eefceeb7489a794a6d18b01c29900 (patch)
tree94fdbc758c623f64ed3e3c145be373ce2f36bb7b /lib/Target/Hexagon/HexagonISelLowering.cpp
parent2e6119429fc521cddd7dde4f8f237ab0ec5ceb06 (diff)
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Hexagon: Remove unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146846 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonISelLowering.cpp')
-rw-r--r--lib/Target/Hexagon/HexagonISelLowering.cpp5
1 files changed, 0 insertions, 5 deletions
diff --git a/lib/Target/Hexagon/HexagonISelLowering.cpp b/lib/Target/Hexagon/HexagonISelLowering.cpp
index 0ac3cf02d1..f2367fb88c 100644
--- a/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -305,9 +305,6 @@ HexagonTargetLowering::LowerReturn(SDValue Chain,
// Analyze return values of ISD::RET
CCInfo.AnalyzeReturn(Outs, RetCC_Hexagon);
- SDValue StackPtr = DAG.getRegister(TM.getRegisterInfo()->getStackRegister(),
- MVT::i32);
-
// If this is the first return lowered for this function, add the regs to the
// liveout set for the function.
if (DAG.getMachineFunction().getRegInfo().liveout_empty()) {
@@ -320,8 +317,6 @@ HexagonTargetLowering::LowerReturn(SDValue Chain,
// Copy the result values into the output registers.
for (unsigned i = 0; i != RVLocs.size(); ++i) {
CCValAssign &VA = RVLocs[i];
- SDValue Ret = OutVals[i];
- ISD::ArgFlagsTy Flags = Outs[i].Flags;
Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);