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authorJyotsna Verma <jverma@codeaurora.org>2012-12-20 06:52:46 +0000
committerJyotsna Verma <jverma@codeaurora.org>2012-12-20 06:52:46 +0000
commit82a36e2b593c84a97a69a50ce2323c19512d543b (patch)
treef8a84316171953f65f6cb558837d5c6c5ee20cf0 /lib/Target/Hexagon/HexagonInstrInfo.td
parent39498d1ff0dc5d1d4379c31a92596377d0d5d8a7 (diff)
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Add constant extender support to GP-relative load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170672 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrInfo.td')
-rw-r--r--lib/Target/Hexagon/HexagonInstrInfo.td31
1 files changed, 18 insertions, 13 deletions
diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td
index dc93fb6b1b..6570bd63cb 100644
--- a/lib/Target/Hexagon/HexagonInstrInfo.td
+++ b/lib/Target/Hexagon/HexagonInstrInfo.td
@@ -990,7 +990,7 @@ def LDrid_GP : LDInst2<(outs DoubleRegs:$dst),
[]>,
Requires<[NoV4T]>;
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def LDd_GP : LDInst2<(outs DoubleRegs:$dst),
(ins globaladdress:$global),
"$dst = memd(#$global)",
@@ -1057,6 +1057,9 @@ let hasCtrlDep = 1, neverHasSideEffects = 1 in {
PredNewRel;
}
+def : Pat< (i32 (extloadi1 ADDRriS11_0:$addr)),
+ (i32 (LDrib ADDRriS11_0:$addr)) >;
+
// Load byte any-extend.
def : Pat < (i32 (extloadi8 ADDRriS11_0:$addr)),
(i32 (LDrib ADDRriS11_0:$addr)) >;
@@ -1073,14 +1076,14 @@ def LDrib_GP : LDInst2<(outs IntRegs:$dst),
[]>,
Requires<[NoV4T]>;
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def LDb_GP : LDInst2<(outs IntRegs:$dst),
(ins globaladdress:$global),
"$dst = memb(#$global)",
[]>,
Requires<[NoV4T]>;
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def LDub_GP : LDInst2<(outs IntRegs:$dst),
(ins globaladdress:$global),
"$dst = memub(#$global)",
@@ -1101,20 +1104,21 @@ def LDrih_GP : LDInst2<(outs IntRegs:$dst),
[]>,
Requires<[NoV4T]>;
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def LDh_GP : LDInst2<(outs IntRegs:$dst),
(ins globaladdress:$global),
"$dst = memh(#$global)",
[]>,
Requires<[NoV4T]>;
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def LDuh_GP : LDInst2<(outs IntRegs:$dst),
(ins globaladdress:$global),
"$dst = memuh(#$global)",
[]>,
Requires<[NoV4T]>;
+let AddedComplexity = 10 in
def : Pat < (i32 (zextloadi1 ADDRriS11_0:$addr)),
(i32 (LDriub ADDRriS11_0:$addr))>;
@@ -1138,8 +1142,9 @@ def LDriuh_GP : LDInst2<(outs IntRegs:$dst),
Requires<[NoV4T]>;
// Load predicate.
-let Defs = [R10,R11,D5], neverHasSideEffects = 1 in
-def LDriw_pred : LDInst<(outs PredRegs:$dst),
+let isExtendable = 1, opExtendable = 2, isExtentSigned = 1, opExtentBits = 13,
+isPseudo = 1, Defs = [R10,R11,D5], neverHasSideEffects = 1 in
+def LDriw_pred : LDInst2<(outs PredRegs:$dst),
(ins MEMri:$addr),
"Error; should not emit",
[]>;
@@ -1152,7 +1157,7 @@ def LDriw_GP : LDInst2<(outs IntRegs:$dst),
[]>,
Requires<[NoV4T]>;
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def LDw_GP : LDInst2<(outs IntRegs:$dst),
(ins globaladdress:$global),
"$dst = memw(#$global)",
@@ -1161,7 +1166,7 @@ def LDw_GP : LDInst2<(outs IntRegs:$dst),
// Deallocate stack frame.
let Defs = [R29, R30, R31], Uses = [R29], neverHasSideEffects = 1 in {
- def DEALLOCFRAME : LDInst2<(outs), (ins i32imm:$amt1),
+ def DEALLOCFRAME : LDInst2<(outs), (ins),
"deallocframe",
[]>;
}
@@ -1393,7 +1398,7 @@ def STrid_GP : STInst2<(outs),
[]>,
Requires<[NoV4T]>;
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def STd_GP : STInst2<(outs),
(ins globaladdress:$global, DoubleRegs:$src),
"memd(#$global) = $src",
@@ -1583,7 +1588,7 @@ def STrib_GP : STInst2<(outs),
Requires<[NoV4T]>;
// memb(#global)=Rt
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def STb_GP : STInst2<(outs),
(ins globaladdress:$global, IntRegs:$src),
"memb(#$global) = $src",
@@ -1623,7 +1628,7 @@ def STrih_GP : STInst2<(outs),
[]>,
Requires<[NoV4T]>;
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def STh_GP : STInst2<(outs),
(ins globaladdress:$global, IntRegs:$src),
"memh(#$global) = $src",
@@ -1672,7 +1677,7 @@ def STriw_GP : STInst2<(outs),
[]>,
Requires<[NoV4T]>;
-let neverHasSideEffects = 1 in
+let neverHasSideEffects = 1, validSubTargets = NoV4SubT in
def STw_GP : STInst2<(outs),
(ins globaladdress:$global, IntRegs:$src),
"memw(#$global) = $src",