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| author | Jyotsna Verma <jverma@codeaurora.org> | 2013-05-14 18:54:06 +0000 |
|---|---|---|
| committer | Jyotsna Verma <jverma@codeaurora.org> | 2013-05-14 18:54:06 +0000 |
| commit | a29a8965e206e689d292d7f2e42f2548770e30d3 (patch) | |
| tree | 138b51a358b8faf8b5ad4c153e4e653590ace1a2 /lib/Target/Hexagon/HexagonInstrInfo.td | |
| parent | f276c70bb8ff25e7c0ef13e9afc59623a3c135ba (diff) | |
| download | llvm-a29a8965e206e689d292d7f2e42f2548770e30d3.tar.gz llvm-a29a8965e206e689d292d7f2e42f2548770e30d3.tar.bz2 llvm-a29a8965e206e689d292d7f2e42f2548770e30d3.tar.xz | |
Hexagon: Pass to replace tranfer/copy instructions into combine instruction
where possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181817 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrInfo.td')
| -rw-r--r-- | lib/Target/Hexagon/HexagonInstrInfo.td | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td index d1e32c65ad..c96aaca8f8 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.td +++ b/lib/Target/Hexagon/HexagonInstrInfo.td @@ -384,6 +384,12 @@ def TFCR : CRInst<(outs CRRegs:$dst), (ins IntRegs:$src1), // ALU32/PERM + //===----------------------------------------------------------------------===// +let neverHasSideEffects = 1 in +def COMBINE_ii : ALU32_ii<(outs DoubleRegs:$dst), + (ins s8Imm:$src1, s8Imm:$src2), + "$dst = combine(#$src1, #$src2)", + []>; + // Mux. def VMUX_prr64 : ALU64_rr<(outs DoubleRegs:$dst), (ins PredRegs:$src1, DoubleRegs:$src2, |