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| author | Sirish Pande <spande@codeaurora.org> | 2012-02-15 18:52:27 +0000 |
|---|---|---|
| committer | Sirish Pande <spande@codeaurora.org> | 2012-02-15 18:52:27 +0000 |
| commit | ab7955b9ce3197215406bc9fc97b22074127d035 (patch) | |
| tree | 3d687b6a7fb5ce78376085798a800ac7cbb95c35 /lib/Target/Hexagon/HexagonSelectCCInfo.td | |
| parent | 2a4bc1e703335e496e3a78f97d1b1d544aac746d (diff) | |
| download | llvm-ab7955b9ce3197215406bc9fc97b22074127d035.tar.gz llvm-ab7955b9ce3197215406bc9fc97b22074127d035.tar.bz2 llvm-ab7955b9ce3197215406bc9fc97b22074127d035.tar.xz | |
Optimize redundant sign extends and negation of predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150606 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonSelectCCInfo.td')
| -rw-r--r-- | lib/Target/Hexagon/HexagonSelectCCInfo.td | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/Hexagon/HexagonSelectCCInfo.td b/lib/Target/Hexagon/HexagonSelectCCInfo.td index f21d928c77..dcee59fb84 100644 --- a/lib/Target/Hexagon/HexagonSelectCCInfo.td +++ b/lib/Target/Hexagon/HexagonSelectCCInfo.td @@ -18,7 +18,7 @@ def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, IntRegs:$fval, SETNE)), - (i32 (MUX_rr (i1 (NOT_Ps (CMPEQrr IntRegs:$lhs, IntRegs:$rhs))), + (i32 (MUX_rr (i1 (NOT_p (CMPEQrr IntRegs:$lhs, IntRegs:$rhs))), IntRegs:$tval, IntRegs:$fval))>; def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, @@ -35,24 +35,24 @@ def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, IntRegs:$fval, SETULT)), - (i32 (MUX_rr (i1 (NOT_Ps (CMPGTUrr IntRegs:$lhs, + (i32 (MUX_rr (i1 (NOT_p (CMPGTUrr IntRegs:$lhs, (ADD_ri IntRegs:$rhs, -1)))), IntRegs:$tval, IntRegs:$fval))>; def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, IntRegs:$fval, SETLT)), - (i32 (MUX_rr (i1 (NOT_Ps (CMPGTrr IntRegs:$lhs, + (i32 (MUX_rr (i1 (NOT_p (CMPGTrr IntRegs:$lhs, (ADD_ri IntRegs:$rhs, -1)))), IntRegs:$tval, IntRegs:$fval))>; def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, IntRegs:$fval, SETLE)), - (i32 (MUX_rr (i1 (NOT_Ps (CMPGTrr IntRegs:$lhs, IntRegs:$rhs))), + (i32 (MUX_rr (i1 (NOT_p (CMPGTrr IntRegs:$lhs, IntRegs:$rhs))), IntRegs:$tval, IntRegs:$fval))>; def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval, IntRegs:$fval, SETULE)), - (i32 (MUX_rr (i1 (NOT_Ps (CMPGTUrr IntRegs:$lhs, IntRegs:$rhs))), + (i32 (MUX_rr (i1 (NOT_p (CMPGTUrr IntRegs:$lhs, IntRegs:$rhs))), IntRegs:$tval, IntRegs:$fval))>; @@ -86,7 +86,7 @@ def : Pat <(i32 (selectcc PredRegs:$lhs, PredRegs:$rhs, IntRegs:$tval, def : Pat <(i32 (selectcc PredRegs:$lhs, PredRegs:$rhs, IntRegs:$tval, IntRegs:$fval, SETEQ)), - (i32 (MUX_rr (i1 (NOT_pp (XOR_pp PredRegs:$lhs, PredRegs:$rhs))), + (i32 (MUX_rr (i1 (NOT_p (XOR_pp PredRegs:$lhs, PredRegs:$rhs))), IntRegs:$tval, IntRegs:$fval))>; |