Use TSFlag bit to describe instruction properties.

Creating the isPredicated TSFlag enables the code
to use the property defined in the instruction format
instead of using a large switch statement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150078 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 43 insertions, 0 deletions

diff --git a/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h b/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h
new file mode 100644
index 0000000000..13ef9e1694
--- /dev/null
+++ b/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h
@@ -0,0 +1,43 @@
+//===-- HexagonBaseInfo.h - Top level definitions for Hexagon -------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains small standalone helper functions and enum definitions for
+// the Hexagon target useful for the compiler back-end and the MC libraries.
+// As such, it deliberately does not include references to LLVM core
+// code gen types, passes, etc..
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef HEXAGONBASEINFO_H
+#define HEXAGONBASEINFO_H
+
+namespace llvm {
+
+/// HexagonII - This namespace holds all of the target specific flags that
+/// instruction info tracks.
+///
+namespace HexagonII {
+
+  // *** The code below must match HexagonInstrFormat*.td ***
+
+  // MCInstrDesc TSFlags
+  enum {
+
+    // Predicated instructions.
+    PredicatedPos  = 1,
+    PredicatedMask = 0x1
+  };
+
+  // *** The code above must match HexagonInstrFormat*.td ***
+
+} // End namespace HexagonII.
+
+} // End namespace llvm.
+
+#endif