Add 8-bit regclass and pattern for sext_inreg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70721 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 7 insertions, 7 deletions

diff --git a/lib/Target/MSP430/MSP430RegisterInfo.cpp b/lib/Target/MSP430/MSP430RegisterInfo.cpp
index ff6d531cfd..292dd28129 100644
--- a/lib/Target/MSP430/MSP430RegisterInfo.cpp
+++ b/lib/Target/MSP430/MSP430RegisterInfo.cpp
@@ -31,8 +31,8 @@ MSP430RegisterInfo::MSP430RegisterInfo(const TargetInstrInfo &tii)
 const unsigned*
 MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
   static const unsigned CalleeSavedRegs[] = {
-    MSP430::FP, MSP430::R5, MSP430::R6, MSP430::R7,
-    MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11,
+    MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W,
+    MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
     0
   };
 
@@ -57,14 +57,14 @@ MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   BitVector Reserved(getNumRegs());
 
   // Mark 4 special registers as reserved.
-  Reserved.set(MSP430::PC);
-  Reserved.set(MSP430::SP);
-  Reserved.set(MSP430::SR);
-  Reserved.set(MSP430::CG);
+  Reserved.set(MSP430::PCW);
+  Reserved.set(MSP430::SPW);
+  Reserved.set(MSP430::SRW);
+  Reserved.set(MSP430::CGW);
 
   // Mark frame pointer as reserved if needed.
   if (hasFP(MF))
-    Reserved.set(MSP430::FP);
+    Reserved.set(MSP430::FPW);
 
   return Reserved;
 }