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authorReed Kotler <rkotler@mips.com>2013-02-13 20:28:27 +0000
committerReed Kotler <rkotler@mips.com>2013-02-13 20:28:27 +0000
commit6b9d4617800d9450825f8a4b122a9aeb76f2795f (patch)
treec93e5dc6df7bc40175ee7348f5c282e659c0c8b6 /lib/Target/Mips/Mips16InstrInfo.cpp
parentf098620095727dd2a823a94a3a8d47108361ad83 (diff)
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For Mips 16, add the optimization where the 16 bit form of addiu sp can be used
if the offset fits in 11 bits. This makes use of the fact that the abi requires sp to be 8 byte aligned so the actual offset can fit in 8 bits. It will be shifted left and sign extended before being actually used. The assembler or direct object emitter will shift right the 11 bit signed field by 3 bits. We don't need to deal with that here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175073 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16InstrInfo.cpp')
-rw-r--r--lib/Target/Mips/Mips16InstrInfo.cpp15
1 files changed, 12 insertions, 3 deletions
diff --git a/lib/Target/Mips/Mips16InstrInfo.cpp b/lib/Target/Mips/Mips16InstrInfo.cpp
index 9f27ac3517..5a91519fd8 100644
--- a/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -184,7 +184,7 @@ void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
int64_t Remainder = FrameSize - Base;
BuildMI(MBB, I, DL, get(Mips::SaveRaF16)). addImm(Base);
if (isInt<16>(-Remainder))
- BuildMI(MBB, I, DL, get(Mips::AddiuSpImmX16)). addImm(-Remainder);
+ BuildAddiuSpImm(MBB, I, DL, -Remainder);
else
adjustStackPtrBig(SP, -Remainder, MBB, I, Mips::V0, Mips::V1);
}
@@ -225,7 +225,7 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
// returns largest possible n bit unsigned integer
int64_t Remainder = FrameSize - Base;
if (isInt<16>(Remainder))
- BuildMI(MBB, I, DL, get(Mips::AddiuSpImmX16)). addImm(Remainder);
+ BuildAddiuSpImm(MBB, I, DL, Remainder);
else
adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
BuildMI(MBB, I, DL, get(Mips::RestoreRaF16)). addImm(Base);
@@ -299,7 +299,7 @@ void Mips16InstrInfo::adjustStackPtr(unsigned SP, int64_t Amount,
MachineBasicBlock::iterator I) const {
DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
if (isInt<16>(Amount)) // need to change to addiu sp, ....and isInt<16>
- BuildMI(MBB, I, DL, get(Mips::AddiuSpImmX16)). addImm(Amount);
+ BuildAddiuSpImm(MBB, I, DL, Amount);
else
adjustStackPtrBigUnrestricted(SP, Amount, MBB, I);
}
@@ -400,6 +400,15 @@ void Mips16InstrInfo::ExpandRetRA16(MachineBasicBlock &MBB,
BuildMI(MBB, I, I->getDebugLoc(), get(Opc));
}
+void Mips16InstrInfo::BuildAddiuSpImm(
+ MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator II, DebugLoc DL, int64_t Imm) const {
+ if (validSpImm8(Imm))
+ BuildMI(MBB, II, DL, get(Mips::AddiuSpImm16)).addImm(Imm);
+ else
+ BuildMI(MBB, II, DL, get(Mips::AddiuSpImmX16)).addImm(Imm);
+}
+
const MipsInstrInfo *llvm::createMips16InstrInfo(MipsTargetMachine &TM) {
return new Mips16InstrInfo(TM);
}