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| author | Reed Kotler <rkotler@mips.com> | 2013-11-12 02:27:12 +0000 |
|---|---|---|
| committer | Reed Kotler <rkotler@mips.com> | 2013-11-12 02:27:12 +0000 |
| commit | c6d4d667a8a56b341fac949153ec5939857445df (patch) | |
| tree | 39c1fc2e227d69ba7dd82784f97009385133a90a /lib/Target/Mips/Mips16InstrInfo.td | |
| parent | 161dd53f1ef74b31b5afa0aeb55619ae924a6877 (diff) | |
| download | llvm-c6d4d667a8a56b341fac949153ec5939857445df.tar.gz llvm-c6d4d667a8a56b341fac949153ec5939857445df.tar.bz2 llvm-c6d4d667a8a56b341fac949153ec5939857445df.tar.xz | |
Change the default branch instruction to be the 16 bit variety for mips16.
This has no material effect at this time since we don't have a direct
object emitter for mips16 and the assembler can't tell them apart. I
place a comment "16 bit inst" for those so that I can tell them apart in the
output. The constant island pass has only been minimally changed to allow
this. More complete branch work is forthcoming but this is the first
step.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194442 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips16InstrInfo.td | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td index 9ce0139f42..4415ccb7df 100644 --- a/lib/Target/Mips/Mips16InstrInfo.td +++ b/lib/Target/Mips/Mips16InstrInfo.td @@ -32,6 +32,16 @@ def mem16_ea : Operand<i32> { } // +// I-type instruction format +// +// this is only used by bimm. the actual assembly value is a 12 bit signed +// number +// +class FI16_ins<bits<5> op, string asmstr, InstrItinClass itin>: + FI16<op, (outs), (ins brtarget:$imm16), + !strconcat(asmstr, "\t$imm16 # 16 bit inst"), [], itin>; + +// // // I8 instruction format // @@ -577,6 +587,14 @@ def BeqzRxImm16: FRI16_B_ins<0b00100, "beqz", IIAlu>, cbranch16; // def BeqzRxImmX16: FEXT_RI16_B_ins<0b00100, "beqz", IIAlu>, cbranch16; +// +// Format: B offset MIPS16e +// Purpose: Unconditional Branch (Extended) +// To do an unconditional PC-relative branch. +// + +def Bimm16: FI16_ins<0b00010, "b", IIAlu>, branch16; + // Format: B offset MIPS16e // Purpose: Unconditional Branch // To do an unconditional PC-relative branch. @@ -1509,7 +1527,7 @@ def: Mips16Pat // (BtnezT8SltuX16 CPU16Regs:$rx, CPU16Regs:$ry, bb:$imm16) // >; -def: UncondBranch16_pat<br, BimmX16>; +def: UncondBranch16_pat<br, Bimm16>; // Small immediates def: Mips16Pat<(i32 immSExt16:$in), |