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authorReed Kotler <rkotler@mips.com>2012-12-20 04:44:58 +0000
committerReed Kotler <rkotler@mips.com>2012-12-20 04:44:58 +0000
commit1f23239c5bdbeb45a612238acd48bb497b3cce15 (patch)
treeb81c55fbd2627a7973812e30e942fae90544b54f /lib/Target/Mips/Mips16RegisterInfo.h
parent9bf571fe2c24305aee6a930ed3b2561f6d4ff237 (diff)
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Turn on register scavenger for Mips 16
We use an unused Mips 32 register for the emergency slot instead of using the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170665 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16RegisterInfo.h')
-rw-r--r--lib/Target/Mips/Mips16RegisterInfo.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips16RegisterInfo.h b/lib/Target/Mips/Mips16RegisterInfo.h
index 153def20d0..ba0d25d5b0 100644
--- a/lib/Target/Mips/Mips16RegisterInfo.h
+++ b/lib/Target/Mips/Mips16RegisterInfo.h
@@ -27,6 +27,19 @@ public:
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
+
+ bool requiresRegisterScavenging(const MachineFunction &MF) const;
+
+ bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
+
+ bool useFPForScavengingIndex(const MachineFunction &MF) const;
+
+ bool saveScavengerRegister(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I,
+ MachineBasicBlock::iterator &UseMI,
+ const TargetRegisterClass *RC,
+ unsigned Reg) const;
+
private:
virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
int FrameIndex, uint64_t StackSize,