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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-27 04:08:42 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-27 04:08:42 +0000 |
commit | 833f7a5c4b77796d1ad739b8d92d824612cd819e (patch) | |
tree | bf27848bbbed0ffe9b794c934bd05bfba6874db9 /lib/Target/Mips/MipsDSPInstrFormats.td | |
parent | 451b0e7b8a56457114d8989ac836163d82a1cf5e (diff) | |
download | llvm-833f7a5c4b77796d1ad739b8d92d824612cd819e.tar.gz llvm-833f7a5c4b77796d1ad739b8d92d824612cd819e.tar.bz2 llvm-833f7a5c4b77796d1ad739b8d92d824612cd819e.tar.xz |
MIPS DSP: rddsp (instruction which reads DSPControl register fields to a GPR).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164756 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsDSPInstrFormats.td')
-rw-r--r-- | lib/Target/Mips/MipsDSPInstrFormats.td | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsDSPInstrFormats.td b/lib/Target/Mips/MipsDSPInstrFormats.td index 9e96bdfe00..2c6e767cf3 100644 --- a/lib/Target/Mips/MipsDSPInstrFormats.td +++ b/lib/Target/Mips/MipsDSPInstrFormats.td @@ -174,6 +174,18 @@ class SHILO_R2_FMT<bits<5> op> : DSPInst { let Inst{5-0} = 0b111000; } +class RDDSP_FMT<bits<5> op> : DSPInst { + bits<5> rd; + bits<10> mask; + + let Opcode = SPECIAL3_OPCODE.V; + + let Inst{25-16} = mask; + let Inst{15-11} = rd; + let Inst{10-6} = op; + let Inst{5-0} = 0b111000; +} + class BPOSGE32_FMT<bits<5> op> : DSPInst { bits<16> offset; |