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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-20 21:08:22 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-20 21:08:22 +0000 |
| commit | a98a486ad194c38293efcc5359d6ed2493f950dc (patch) | |
| tree | 69d07a78f28f49d3e809589d088a240f0a923d12 /lib/Target/Mips/MipsDSPInstrInfo.td | |
| parent | 0323d4b169279414862174f38ae04add6b747a60 (diff) | |
| download | llvm-a98a486ad194c38293efcc5359d6ed2493f950dc.tar.gz llvm-a98a486ad194c38293efcc5359d6ed2493f950dc.tar.bz2 llvm-a98a486ad194c38293efcc5359d6ed2493f950dc.tar.xz | |
[mips] Resolve register classes dynamically using ptr_rc to reduce the number of
load/store instructions defined. Previously, we were defining load/store
instructions for each pointer size (32 and 64-bit), but now we need just one
definition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188830 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsDSPInstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/MipsDSPInstrInfo.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Mips/MipsDSPInstrInfo.td b/lib/Target/Mips/MipsDSPInstrInfo.td index 5020aa3fc0..53e3389c2e 100644 --- a/lib/Target/Mips/MipsDSPInstrInfo.td +++ b/lib/Target/Mips/MipsDSPInstrInfo.td @@ -1242,12 +1242,12 @@ def PREPEND : PREPEND_ENC, PREPEND_DESC; // Pseudos. let isPseudo = 1, isCodeGenOnly = 1 in { // Pseudo instructions for loading and storing accumulator registers. - defm LOAD_ACC64DSP : LoadM<"", ACC64DSPOpnd>; - defm STORE_ACC64DSP : StoreM<"", ACC64DSPOpnd>; + def LOAD_ACC64DSP : Load<"", ACC64DSPOpnd>; + def STORE_ACC64DSP : Store<"", ACC64DSPOpnd>; // Pseudos for loading and storing ccond field of DSP control register. - defm LOAD_CCOND_DSP : LoadM<"load_ccond_dsp", DSPCC>; - defm STORE_CCOND_DSP : StoreM<"store_ccond_dsp", DSPCC>; + def LOAD_CCOND_DSP : Load<"load_ccond_dsp", DSPCC>; + def STORE_CCOND_DSP : Store<"store_ccond_dsp", DSPCC>; } // Pseudo CMP and PICK instructions. |