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author | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-05 02:04:17 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-05 02:04:17 +0000 |
commit | 0f0c59a0f881d7743bc518ed16022109447e5a4b (patch) | |
tree | 425d96c934012bd4cb0617198a50d87dccb0aa84 /lib/Target/Mips/MipsDelaySlotFiller.cpp | |
parent | 7d8e04d5f199228ad385d6005f46f0defa23039b (diff) | |
download | llvm-0f0c59a0f881d7743bc518ed16022109447e5a4b.tar.gz llvm-0f0c59a0f881d7743bc518ed16022109447e5a4b.tar.bz2 llvm-0f0c59a0f881d7743bc518ed16022109447e5a4b.tar.xz |
Remove function Filler::insertCallUses.
Record the registers used and defined by a call in Filler::insertDefsUses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141154 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsDelaySlotFiller.cpp')
-rw-r--r-- | lib/Target/Mips/MipsDelaySlotFiller.cpp | 43 |
1 files changed, 14 insertions, 29 deletions
diff --git a/lib/Target/Mips/MipsDelaySlotFiller.cpp b/lib/Target/Mips/MipsDelaySlotFiller.cpp index ac4cdcbb55..e848a7b025 100644 --- a/lib/Target/Mips/MipsDelaySlotFiller.cpp +++ b/lib/Target/Mips/MipsDelaySlotFiller.cpp @@ -129,11 +129,7 @@ bool Filler::findDelayInstr(MachineBasicBlock &MBB, SmallSet<unsigned, 32> RegDefs; SmallSet<unsigned, 32> RegUses; - // Call's delay filler can def some of call's uses. - if (slot->getDesc().isCall()) - insertCallUses(slot, RegDefs, RegUses); - else - insertDefsUses(slot, RegDefs, RegUses); + insertDefsUses(slot, RegDefs, RegUses); bool sawLoad = false; bool sawStore = false; @@ -215,39 +211,28 @@ bool Filler::delayHasHazard(MachineBasicBlock::iterator candidate, return false; } -void Filler::insertCallUses(MachineBasicBlock::iterator MI, - SmallSet<unsigned, 32>& RegDefs, - SmallSet<unsigned, 32>& RegUses) { - switch(MI->getOpcode()) { - default: llvm_unreachable("Unknown opcode."); - case Mips::JAL: - RegDefs.insert(31); - break; - case Mips::JALR: - assert(MI->getNumOperands() >= 1); - const MachineOperand &Reg = MI->getOperand(0); - assert(Reg.isReg() && "JALR first operand is not a register."); - RegUses.insert(Reg.getReg()); - RegDefs.insert(31); - break; - } -} - // Insert Defs and Uses of MI into the sets RegDefs and RegUses. void Filler::insertDefsUses(MachineBasicBlock::iterator MI, SmallSet<unsigned, 32>& RegDefs, SmallSet<unsigned, 32>& RegUses) { - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + // If MI is a call, just examine the explicit non-variadic operands. + // NOTE: $ra is not added to RegDefs, since currently $ra is reserved and + // no instruction that can possibly be put in a delay slot can read or + // write it. + + unsigned e = MI->getDesc().isCall() ? MI->getDesc().getNumOperands() : + MI->getNumOperands(); + + for (unsigned i = 0; i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg()) - continue; + unsigned Reg; - unsigned Reg = MO.getReg(); - if (Reg == 0) + if (!MO.isReg() || !(Reg = MO.getReg())) continue; + if (MO.isDef()) RegDefs.insert(Reg); - if (MO.isUse()) + else if (MO.isUse()) RegUses.insert(Reg); } } |