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author | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-05 18:11:44 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-05 18:11:44 +0000 |
commit | 2f52338f50cc629f7a43bef3caf0d20af53fe284 (patch) | |
tree | a94a547c64768517e829e746ea5a78e8adc1644a /lib/Target/Mips/MipsDelaySlotFiller.cpp | |
parent | 2dbb46a0a09d4a16a6752cfcbe1d55d51e7d2a31 (diff) | |
download | llvm-2f52338f50cc629f7a43bef3caf0d20af53fe284.tar.gz llvm-2f52338f50cc629f7a43bef3caf0d20af53fe284.tar.bz2 llvm-2f52338f50cc629f7a43bef3caf0d20af53fe284.tar.xz |
Add RA to the set of registers that are defined if instruction is a call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141194 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsDelaySlotFiller.cpp')
-rw-r--r-- | lib/Target/Mips/MipsDelaySlotFiller.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Mips/MipsDelaySlotFiller.cpp b/lib/Target/Mips/MipsDelaySlotFiller.cpp index 059c111edb..b8443c1030 100644 --- a/lib/Target/Mips/MipsDelaySlotFiller.cpp +++ b/lib/Target/Mips/MipsDelaySlotFiller.cpp @@ -218,13 +218,13 @@ void Filler::insertDefsUses(MachineBasicBlock::iterator MI, SmallSet<unsigned, 32>& RegDefs, SmallSet<unsigned, 32>& RegUses) { // If MI is a call or return, just examine the explicit non-variadic operands. - // NOTE: $ra is not added to RegDefs, since currently $ra is reserved and - // no instruction that can possibly be put in a delay slot can read or - // write it. - MCInstrDesc MCID = MI->getDesc(); unsigned e = MCID.isCall() || MCID.isReturn() ? MCID.getNumOperands() : MI->getNumOperands(); + + // Add RA to RegDefs to prevent users of RA from going into delay slot. + if (MCID.isCall()) + RegDefs.insert(Mips::RA); for (unsigned i = 0; i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); |