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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-07-21 02:15:19 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-07-21 02:15:19 +0000 |
commit | b7dd9fc678ab4b4c57d333cd9940b0e0d7952ea6 (patch) | |
tree | b2f0f1461d212b4f4f56cf1962230041277734ae /lib/Target/Mips/MipsISelDAGToDAG.cpp | |
parent | c606c3ff911eddcbf8bab95e67c7d8c1f69a493e (diff) | |
download | llvm-b7dd9fc678ab4b4c57d333cd9940b0e0d7952ea6.tar.gz llvm-b7dd9fc678ab4b4c57d333cd9940b0e0d7952ea6.tar.bz2 llvm-b7dd9fc678ab4b4c57d333cd9940b0e0d7952ea6.tar.xz |
Add VK_Mips_HIGHER and VK_Mips_HIGHEST to MCSymbolRefExpr::VariantKind.
Test case will be added later when long branch patch is checked in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160597 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelDAGToDAG.cpp')
-rw-r--r-- | lib/Target/Mips/MipsISelDAGToDAG.cpp | 34 |
1 files changed, 26 insertions, 8 deletions
diff --git a/lib/Target/Mips/MipsISelDAGToDAG.cpp b/lib/Target/Mips/MipsISelDAGToDAG.cpp index c409e57021..ea33b74a75 100644 --- a/lib/Target/Mips/MipsISelDAGToDAG.cpp +++ b/lib/Target/Mips/MipsISelDAGToDAG.cpp @@ -128,18 +128,21 @@ void MipsDAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) { const MipsInstrInfo *MII = TM.getInstrInfo(); const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); - unsigned V0, V1, GlobalBaseReg = MipsFI->getGlobalBaseReg(); - int FI = 0; + unsigned V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg(); + int FI = 0; - if (!Subtarget.inMips16Mode()) - FI= MipsFI->initGlobalRegFI(); + FI= MipsFI->initGlobalRegFI(); const TargetRegisterClass *RC = Subtarget.isABI_N64() ? (const TargetRegisterClass*)&Mips::CPU64RegsRegClass : (const TargetRegisterClass*)&Mips::CPURegsRegClass; + if (Subtarget.inMips16Mode()) + RC=(const TargetRegisterClass*)&Mips::CPU16RegsRegClass; + V0 = RegInfo.createVirtualRegister(RC); V1 = RegInfo.createVirtualRegister(RC); + V2 = RegInfo.createVirtualRegister(RC); if (Subtarget.isABI_N64()) { MF.getRegInfo().addLiveIn(Mips::T9_64); @@ -160,6 +163,21 @@ void MipsDAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) { return; } + if (Subtarget.inMips16Mode()) { + BuildMI(MBB, I, DL, TII.get(Mips::LiRxImmX16), V0) + .addExternalSymbol("_gp_disp", MipsII::MO_ABS_HI); + BuildMI(MBB, I, DL, TII.get(Mips::AddiuRxPcImmX16), + V1) + .addExternalSymbol("_gp_disp", MipsII::MO_ABS_LO); + BuildMI(MBB, I, DL, TII.get(Mips::SllX16), + V2 ).addReg(V0).addImm(16); + BuildMI(MBB, I, DL, TII.get(Mips::AdduRxRyRz16), GlobalBaseReg) + .addReg(V1).addReg(V2); + + + return; + } + if (MF.getTarget().getRelocationModel() == Reloc::Static) { // Set global register to __gnu_local_gp. // @@ -169,8 +187,6 @@ void MipsDAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) { .addExternalSymbol("__gnu_local_gp", MipsII::MO_ABS_HI); BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0) .addExternalSymbol("__gnu_local_gp", MipsII::MO_ABS_LO); - MII->storeRegToStackSlot(MBB, I, GlobalBaseReg, false, FI, RC, - TargetRegInfo); return; } @@ -194,8 +210,10 @@ void MipsDAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) { assert(Subtarget.isABI_O32()); - if (Subtarget.inMips16Mode()) - return; // no need to load GP. It can be calculated anywhere + + //if (Subtarget.inMips16Mode()) + // return; // no need to load GP. It can be calculated anywhere + // For O32 ABI, the following instruction sequence is emitted to initialize |