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author | Akira Hatanaka <ahatanaka@mips.com> | 2013-02-15 21:20:45 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-02-15 21:20:45 +0000 |
commit | dc2f79274021a590d6b72acd741117068c3e49bd (patch) | |
tree | 8ea5c2d174b3bb4aad8828ecc135550391333e95 /lib/Target/Mips/MipsISelDAGToDAG.cpp | |
parent | 79cd4118090a3c0bc80cafc699a51abf1d6299f3 (diff) | |
download | llvm-dc2f79274021a590d6b72acd741117068c3e49bd.tar.gz llvm-dc2f79274021a590d6b72acd741117068c3e49bd.tar.bz2 llvm-dc2f79274021a590d6b72acd741117068c3e49bd.tar.xz |
[mips] Split SelectAddr, which was used to match address patterns, into two
functions. Set AddedComplexity to determine the order in which patterns are
matched.
This simplifies selection of floating point loads/stores.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175300 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelDAGToDAG.cpp')
-rw-r--r-- | lib/Target/Mips/MipsISelDAGToDAG.cpp | 39 |
1 files changed, 26 insertions, 13 deletions
diff --git a/lib/Target/Mips/MipsISelDAGToDAG.cpp b/lib/Target/Mips/MipsISelDAGToDAG.cpp index c5f12907d9..385ade5b2a 100644 --- a/lib/Target/Mips/MipsISelDAGToDAG.cpp +++ b/lib/Target/Mips/MipsISelDAGToDAG.cpp @@ -96,7 +96,17 @@ private: SDNode *Select(SDNode *N); // Complex Pattern. - bool SelectAddr(SDNode *Parent, SDValue N, SDValue &Base, SDValue &Offset); + /// (reg + imm). + bool selectAddrRegImm(SDNode *Parent, SDValue Addr, SDValue &Base, + SDValue &Offset) const; + + /// Fall back on this function if all else fails. + bool selectAddrDefault(SDNode *Parent, SDValue Addr, SDValue &Base, + SDValue &Offset) const; + + /// Match integer address pattern. + bool selectIntAddr(SDNode *Parent, SDValue Addr, SDValue &Base, + SDValue &Offset) const; bool SelectAddr16(SDNode *Parent, SDValue N, SDValue &Base, SDValue &Offset, SDValue &Alias); @@ -323,8 +333,8 @@ SDValue MipsDAGToDAGISel::getMips16SPAliasReg() { /// ComplexPattern used on MipsInstrInfo /// Used on Mips Load/Store instructions -bool MipsDAGToDAGISel:: -SelectAddr(SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset) { +bool MipsDAGToDAGISel::selectAddrRegImm(SDNode *Parent, SDValue Addr, + SDValue &Base, SDValue &Offset) const { EVT ValTy = Addr.getValueType(); // if Address is FI, get the TargetFrameIndex. @@ -384,21 +394,24 @@ SelectAddr(SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset) { return true; } } - - // If an indexed floating point load/store can be emitted, return false. - const LSBaseSDNode *LS = dyn_cast<LSBaseSDNode>(Parent); - - if (LS && - (LS->getMemoryVT() == MVT::f32 || LS->getMemoryVT() == MVT::f64) && - Subtarget.hasFPIdx()) - return false; } - Base = Addr; - Offset = CurDAG->getTargetConstant(0, ValTy); + return false; +} + +bool MipsDAGToDAGISel::selectAddrDefault(SDNode *Parent, SDValue Addr, + SDValue &Base, SDValue &Offset) const { + Base = Addr; + Offset = CurDAG->getTargetConstant(0, Addr.getValueType()); return true; } +bool MipsDAGToDAGISel::selectIntAddr(SDNode *Parent, SDValue Addr, + SDValue &Base, SDValue &Offset) const { + return selectAddrRegImm(Parent, Addr, Base, Offset) || + selectAddrDefault(Parent, Addr, Base, Offset); +} + void MipsDAGToDAGISel::getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg) { SDValue AliasFPReg = CurDAG->getRegister(Mips::S0, TLI.getPointerTy()); if (Parent) { |