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author | Duncan Sands <baldrick@free.fr> | 2011-09-06 19:07:46 +0000 |
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committer | Duncan Sands <baldrick@free.fr> | 2011-09-06 19:07:46 +0000 |
commit | 28b77e968d2b01fc9da724762bd8ddcd80650e32 (patch) | |
tree | 711ee16dd99789ee82f4891e436cdd38535667da /lib/Target/Mips/MipsISelLowering.h | |
parent | 4a51708448e8958d8d1a375c055f1b98c8e20926 (diff) | |
download | llvm-28b77e968d2b01fc9da724762bd8ddcd80650e32.tar.gz llvm-28b77e968d2b01fc9da724762bd8ddcd80650e32.tar.bz2 llvm-28b77e968d2b01fc9da724762bd8ddcd80650e32.tar.xz |
Add codegen support for vector select (in the IR this means a select
with a vector condition); such selects become VSELECT codegen nodes.
This patch also removes VSETCC codegen nodes, unifying them with SETCC
nodes (codegen was actually often using SETCC for vector SETCC already).
This ensures that various DAG combiner optimizations kick in for vector
comparisons. Passes dragonegg bootstrap with no testsuite regressions
(nightly testsuite as well as "make check-all"). Patch mostly by
Nadav Rotem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.h')
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h index ac3df7d3cb..4990e7221e 100644 --- a/lib/Target/Mips/MipsISelLowering.h +++ b/lib/Target/Mips/MipsISelLowering.h @@ -108,7 +108,7 @@ namespace llvm { virtual const char *getTargetNodeName(unsigned Opcode) const; /// getSetCCResultType - get the ISD::SETCC result ValueType - MVT::SimpleValueType getSetCCResultType(EVT VT) const; + EVT getSetCCResultType(EVT VT) const; virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; private: |